Methods and apparatus storing expanded width instructions in...

Details Methods and apparatus storing expanded width instructions in... Methods and apparatus storing expanded width instructions in...

2011-06-14

2011-06-14

Pan, Daniel (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction fetching

C712S206000

Reexamination Certificate

active

07962723

ABSTRACT:
Techniques are described for decoupling fetching of an instruction stored in a main program memory from earliest execution of the instruction. An indirect execution method and program instructions to support such execution are addressed. In addition, an improved indirect deferred execution processor (DXP) VLIW architecture is described which supports a scalable array of memory centric processor elements that do not require local load and store units.

REFERENCES:
patent: 5301137 (1994-04-01), Matsuo et al.
patent: 5560028 (1996-09-01), Sachs et al.
patent: 5677859 (1997-10-01), Kanayama et al.
patent: 5822606 (1998-10-01), Morton
patent: 5923871 (1999-07-01), Gorshtein et al.

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