Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2008-07-29
2008-07-29
Potter, Roy K (Department: 2822)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S127000
Reexamination Certificate
active
07405102
ABSTRACT:
A multi-layer structure (102) includes a first build-up layer structure (202) configured to connect to a heat-generating module (120), a second build-up layer structure (206) configured to connect to a substrate, and a middle layer (204) provided between the first build-up layer structure and the second build-up layer structure, the middle layer including at least one semiconductor component (110) and a heat spreader (130). A first set of thermal vias (210) extend through the first build-up layer structure to the heat spreader, and a second set of thermal vias (2100extend through the second build-up layer structure to the heat spreader, wherein at least a portion of the first set of thermal vias is in thermal contact with the heat-generating module.
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Amrine Craig S.
Chiriac Victor A.
Keser Lizabeth Ann
Leal George R.
Lee Tien Yu T.
Freescale Semiconductor Inc.
Ingrassia Fisher & Lorenz P.C.
Potter Roy K
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