Methods and apparatus for storing expanded width...

Electrical computers and digital processing systems: processing – Instruction fetching

Reexamination Certificate

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Reexamination Certificate

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07577824

ABSTRACT:
Techniques are described for decoupling fetching of an instruction stored in a main program memory from earliest execution of the instruction. An indirect execution method and program instructions to support such execution are addressed. In addition, an improved indirect deferred execution processor (DXP) VLIW architecture is described which supports a scalable array of memory centric processor elements that do not require local load and store units.

REFERENCES:
patent: 4665479 (1987-05-01), Oinaga
patent: 6173389 (2001-01-01), Pechanek et al.
patent: 6341348 (2002-01-01), Tremblay
patent: 6826522 (2004-11-01), Moller et al.
patent: 6847365 (2005-01-01), Miller et al.
patent: 6957321 (2005-10-01), Sheaffer

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