Methods and apparatus for RF shielding in...

Details Methods and apparatus for RF shielding in... Methods and apparatus for RF shielding in...

2006-05-31

2008-11-04

Geyer, Scott B. (Department: 2812)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

C438S106000, C438S107000, C438S109000, C257SE21122, C257SE21567

Reexamination Certificate

active

07446017

ABSTRACT:
A patterned ground shield (PGS) (130) in a vertically-integrated structure includes a patterned conductor (e.g., a metallic layer) provided between a first substrate (110) having a first semiconductor device (1120formed therein and a second substrate (120) having a second device (122) formed therein. A bonding layer (140) is used to bond the vertically-integrated die and/or wafers. The PGS may be formed on a surface (e.g., the backside) of the second (topmost) substrate, or may be formed over the first semiconductor device—for example, on a dielectric layer formed over the first semiconductor device. The PGS may consist of parallel stripes in various patterns, or may be spiral-shaped, lattice-shaped, or the like.

REFERENCES:
patent: 6465892 (2002-10-01), Suga
patent: 6838761 (2005-01-01), Karnezos
patent: 2004/0113254 (2004-06-01), Kamezos
Yue, C. Patrick, and Wong, S. Simon, On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC's, IEEE Journal of Solid-State Circuits, vol. 33, No. 5, May 1998 pp. 743-752.
Ramm, Peter, Frauhhofer IZM Presentation, Jun. 20, 2005.

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