Methods and apparatus for performing fast floating point operati

Details Methods and apparatus for performing fast floating point operati Methods and apparatus for performing fast floating point operati

1998-04-09

1999-10-12

Hoff, Marc S.

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Digital code to digital code converters

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708496, H03M 700, G06F 738

Patent

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059660856

ABSTRACT:
A format for representing floating point numbers reduces the overhead typically associated with parsing floating point numbers and thereby provides for significantly improved processing speeds, particularly for bit-serial processors. According to an exemplary single-precision embodiment, numbers are represented using a 36-bit data format. Extra bits in the representation according to the invention allow certain conditions, such as overflow/underflow and the zero-ness of a number, to be detected and asserted quickly. Other conditions, such as denormalization are subsumed into normal processing through the extension of an exponent range in the representation.

REFERENCES:
patent: 5016210 (1991-05-01), Sprague et al.
patent: 5483476 (1996-01-01), Horen et al.
Texas Instruments TMS320C4x "User's Guide," 2564090-9721 revision A, May, 1991.
IEEE Standard for Binary Floating-Point Arithmetic, ANSI/IEEE Std. 754-1985, New York, NY, Aug. 12, 1985.

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