Methods and apparatus for fluidic self assembly

Adhesive bonding and miscellaneous chemical manufacture – Methods – Surface bonding and/or assembly therefor

Reexamination Certificate

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Details

C156S293000, C427S184000, C427S346000

Reexamination Certificate

active

06623579

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the field of creating assemblies through fluidic self assembly and to the assemblies so created.
BACKGROUND OF THE INVENTION
There are many examples of large arrays of functional components which can provide, produce or detect electromagnetic signals or chemicals or other characteristics. An example of such a large array is that of a display where many pixels or sub-pixels are formed on an array of electronic elements. For example, an active matrix liquid crystal display includes an array of many pixels or sub-pixels which are fabricated on amorphous silicon or polysilicon substrates which are large. As is well known in the art, it is difficult to produce a completely flawless active matrix liquid crystal display (LCD), when the display area is large, such as the LCD's on modern laptop computers. As the display area gets larger and larger, the yield of good displays decreases. This is due to the manner in which these display devices are fabricated.
Silicon VLSI can be used to produce such an array over a silicon wafer's surface, but silicon wafers are limited in size, limited in conductivity, and not transparent. Further, processing of large areas on silicon wafers can be expensive. Displays which valve the light coming through them need to be transparent. Single crystal silicon can be bonded to a glass substrate and then etched to remove most of the area to achieve transparency, but this is intrinsically wasteful in that, for the sake of maximizing light transmission, the majority of the processed material is discarded and becomes chemical waste. The under-utilization of the precious die area wastes resources, causes greater amounts of chemical waste to be generated in the process, and is generally inefficient and expensive. Another example is photodiode arrays which may be used to collect solar energy. Large arrays of silicon photodiodes with concentrating lenses have been made by sawing wafers and using a pick and place assembly, but thermal dissipation is poor for large elements, and the small elements require too much assembly time.
Alternative approaches to fabricating arrays such as displays include fabricating the desired circuitry in an amorphous or polycrystalline semiconductor layer which has been deposited on a substrate, such as glass or quartz. These approaches avoid the limitations of the size of the available single crystal silicon wafers, and avoid the cost of the single crystal wafers, but require expensive deposition of the semiconductor layer, and they still require processing of the entire large substrate to form the active elements in an array, still resulting in the production of much chemical waste and wasted resources. These processes also limit the choice of the substrate; for example, plastic substrates cannot be used due to the nature of the processes which deposit the semiconductor layers. Furthermore, amorphous or polycrystalline silicon semiconductor elements do not perform as well as those made from single crystal semiconductor material. For displays, as an example, it is often difficult or impossible to form some of the desired circuitry out of the amorphous or polycrystalline semiconductor materials. Thus, high frequency edge drivers may be impossible to form out of these materials. This results in the difficulty and expense of attaching an electrical lead for each and every row and column of an array, such as an active matrix liquid crystal display array.
As noted above, another difficulty with the existing techniques is that the large number of elements in a large array results in a low probability that all of them will work properly and thus the yield of acceptably good arrays from the manufacturing process is low. Furthermore, there is no possibility of testing any of the elements until the assembly is complete, and then any imperfection in the array must be tolerated or the entire array could be discarded or special and expensive techniques must be used to repair it. These problems result from the fact that the various elements in the array are fabricated on the array rather than separately.
It is possible to separately produce elements, such as pixel drivers and then place them where desired on a different and perhaps larger substrate. Prior techniques can be generally divided into two types: deterministic methods or random methods. Deterministic methods, such as pick and place, use a human or robot arm to pick each element and place it into its corresponding location in a different substrate. Pick and place methods place devices generally one at a time, and are generally not applicable to very small or numerous elements such as those needed for large arrays, such as an active matrix liquid crystal display. Random placement techniques are more effective and result in high yields if the elements to be placed have the right shape. U.S. Pat. No. 5,545,291 and U.S. Pat. No. 5,904,545 describe methods which use random placement. In this method, microstructures are assembled onto a different substrate through fluid transport. This is sometimes referred to as fluidic self assembly (FSA). Using this technique, various blocks, each containing a functional component, may be fabricated on one substrate and then separated from that substrate and assembled onto a separate substrate through the fluidic self assembly process. The process involves combining the blocks with a fluid and dispensing the fluid and blocks over the surface of a receiving substrate which has receptor regions (e.g. openings). The blocks flow in the fluid over the surface and randomly align onto receptor regions.
Thus the process which uses fluidic self assembly typically requires forming openings in a substrate in order to receive the elements or blocks. Methods are known in the prior art for forming such openings and are described in U.S. Pat. No. 5,545,291. One issue in forming an opening is to create its sidewalls so that blocks will self-align into the opening and drop into the opening. The substrate having openings in the glass layer
10
may be used as a receiving substrate to receive a plurality of elements by using a fluidic self assembly method.
FIG. 1A
shows an example where a separately fabricated element
16
has properly assembled into the opening
14
. However, it has been discovered that at times, an element
16
will not properly assemble into an opening
14
due to the fact that the element
16
becomes turned upside down and then lodges in the top of the opening
14
. An example of this situation is shown in FIG.
1
B. Often times, the inverted element
16
lodges into the opening
14
so tightly that it remains in the opening and prevents non-inverted elements from falling into the opening
14
. Thus, the opening at the end of the assembly process will typically not be filled with an element or perhaps worse, may still contain an inverted element lodged at the top of the opening
14
.
FIGS. 2A through 2D
show an example in the prior art for creating a plurality of openings in a receiving substrate which is designed to receive a plurality of separately fabricated elements which are deposited into the openings through fluidic self assembly. The method shown in
FIGS. 2A through 2D
begins by, in one example, thermally growing a silicon dioxide layer on a silicon substrate
20
. The resulting structure is shown in
FIG. 2A
with the silicon dioxide layer disposed over the silicon substrate
20
. Then, a photoresist material may be applied, and exposed through a lithographic mask and then developed to produce a patterned mask formed from the developed photoresist. Then an etching solution is applied to etch through the patterned mask to create an opening
24
in the silicon dioxide layer
22
. The resulting structure is shown in FIG.
2
B. Then, the silicon dioxide layer
22
with its opening
24
is then used as a patterned mask to etch the silicon layer
22
to create the opening
26
in the silicon layer
20
as shown in FIG.
2
C. This etching of the silicon layer
20
may be perfo

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