Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Patent
1995-12-28
1998-08-04
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
437922, 437228ES, H01L 2900
Patent
active
057897956
ABSTRACT:
An integrated circuit having a semiconductor substrate and an anti-fuse structure formed on the semiconductor substrate. The anti-fuse structure includes a metal-one layer and an anti-fuse layer disposed above the metal-one layer. The anti-fuse layer has a first resistance value when the anti-fuse structure is unprogrammed and a second resistance value lower than the first resistance value when the anti-fuse structure is programmed. There is further provided an etch stop layer disposed above the anti-fuse layer, and an inter-metal oxide layer disposed above the etch stop layer with the inter-metal oxide layer has a via formed therein. Additionally, there is further provided a metal-two layer disposed above the inter-metal oxide layer. In this structure, a portion of the metal-two layer is in electrical contact with the anti-fuse layer through the via in the inter-metal oxide layer.
REFERENCES:
patent: 4174521 (1979-11-01), Neale
patent: 4420766 (1983-12-01), Kasten
patent: 4538167 (1985-08-01), Yoshino et al.
patent: 5120679 (1992-06-01), Boardman et al.
patent: 5272666 (1993-12-01), Tsang et al.
patent: 5290734 (1994-03-01), Boardman et al.
patent: 5298784 (1994-03-01), Gambino et al.
patent: 5300456 (1994-04-01), Tigelaar et al.
patent: 5311039 (1994-05-01), Kimura et al.
patent: 5328868 (1994-07-01), Conti et al.
patent: 5373169 (1994-12-01), McCollum et al.
patent: 5381035 (1995-01-01), Chen et al.
patent: 5404029 (1995-04-01), Husher et al.
patent: 5434432 (1995-07-01), Spratt et al.
patent: 5464790 (1995-11-01), Hawley
patent: 5493144 (1996-02-01), Bryant et al.
patent: 5493146 (1996-02-01), Pramanik et al.
patent: 5557136 (1996-09-01), Gordon et al.
patent: 5593920 (1997-01-01), Haslam et al.
K.E. Gordon and R.J. Wong, "Conducting Filament of the Programmed Metal Electrode Amorphous Silicon Antifuse," QuickLogic Corp., Santa Clara, CA, 1993 IEEE, International Electron Devices Meeting, Dec. 5-8, 1993, Washington, D.C.
Unknown , "Developments in non-volatile FPGAs, " Electronic Engineering, Apr. 1993.
Delgado Miguel A.
Han Yu-Pin
Loh Ying-Tsong
Sanchez Ivan
Carroll J.
VLSI Technology Inc.
LandOfFree
Methods and apparatus for fabricationg anti-fuse devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods and apparatus for fabricationg anti-fuse devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatus for fabricationg anti-fuse devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1180080