Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
1998-09-25
2001-04-17
Jeanpierre, Peguy (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S148000
Reexamination Certificate
active
06218977
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates, generally, to a technique for noise shaping the error which results from imperfectly matched DAC elements and, more particularly, to a circuit arrangement for implementing a data weighted, noise shaping algorithm.
2. Background Art and Technical Problems
Currently known multi-bit data convertors employ discrete data elements, including capacitors, resistors, current sources, and the like, for converting electrical signals from analog to digital form and vice versa. For example, in a typical digital-to-analog converter (DAC), a bank of capacitors is configured such that a selected number of the capacitors release their electrical energy into a summing junction that produces an analog output signal equivalent to the digital input.
In an analog-to-digital convertor (ADC), on the other hand, a plurality of comparators are combined with a voltage divider network such that each comparator compares the same reference voltage to an incrementally higher voltage level associated with the incoming analog signal. A common clock triggers the output of the comparators, such that each comparator generates a high logic (1) or a low logic (0) level with the parallel output of the comparators representing a digital “thermometer code” indicative of the incoming analog voltage level. This thermometer code may then be digitally processed to generate an n-bit digital word representing the converted analog signal.
In both the DAC and ADC implementations, each discrete data convertor element (resistor, capacitor, or the like) is modeled as being identical to every other element. However, those skilled in the art will appreciate that some degree of variation inevitably exists among identically modeled elements due to, for example, manufacturing variations, imperfections in the materials used to fabricate the elements, drift in the electrical characteristics of the elements over time, or other variations due to changes in temperature, humidity, degradation, or the like. Although the absolute error from one element to another is generally controllable to within 0.1%, the cumulative effect of the mismatched elements can be substantial and may be exacerbated in certain data critical applications.
Presently known techniques for reconciling mismatch errors are unsatisfactory. For example, while precise laser trimming and other “matching” techniques have been proposed, the cost is high and thus undesirable in the context of a low-cost semiconductor environment. Moreover, although calibration and recalibration techniques have been proposed, this requires additional processing power, increases complexity, and may also require tuning the discrete elements in the field, a solution which is rarely practical.
More recently, others have proposed the technique of algorithmically manipulating data convertor unit elements to provide a noise shaping of the mismatch associated with these elements. Such techniques are particularly attractive in that prior knowledge of the error magnitudes are not required. See, for example, Jackson, U.S. Pat. No. 5,221,926, issued Jun. 22, 1993 and entitled “Circuit and Method for Canceling Non-Linearity Error Associated With Component Value Mismatches in a Data Converter”; and Lin, et al, “Multi-Bit DAC With Noise-Shaped Element Mismatched”, IEEE Transactions of Circuits and Systems, dated 1996. The entire contents of the foregoing are hereby incorporated herein by this reference.
The technique of algorithmically manipulating the errors associated with mismatched unit elements has received much attention recently in the context of multi-bit sigma-delta implementations. See, Nys, “A 19-Bit Low-Power Multi-bit Sigma-Delta ADC Based on Data Weighting”, IEEE Journal of Solid State Circuits, Volume 32, No. 7, July 1997. The entire contents of the foregoing disclosure is hereby incorporated herein by reference. In the Nys paper, a data weighted averaging (DWA) is proposed in which thermometer codes are rotated by an amount determined by the previous position of the rotated thermometer code. As such, each rotated thermometer code is data weighted in the sense that the position of the last unit element employed in the previous cycle is remembered, so that the next successive unit element becomes the first unit element to be employed in the next cycle. This DWA algorithm insures that every unit element is utilized as quickly as possible and, over time, that every unit element is used the same number of times. Serendipitously, it has also been determined that the use of a DWA algorithm inherently implements first order noise shaping.
Various theoretical proposals and other “block diagram” implementations have been proposed for algorithmically manipulating unit elements. See, for example, Nys, et al., IEEE Journal of Solid-State Circuits, Vol. 32, No. 7, entitled “A 19-Bit Low-Power Multibit Sigma-Delta ADC Based on Data Weighted Averaging” dated July 1997; Henderson, et al., IEEE Transactions of Circuits and Systems entitled “Dynamic Element Matching Techniques with Arbitrary Noise Shaping Function”; Nys, et al, “An Analysis of Dynamic Element Matching Techniques in Sigma-Data Modulation.” IEEE, dated 1996; Lin, et al. entitled “Multi-Bit DAC with Noise-Shaped Element Mismatch”; Galton, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, entitled “Spectral Shaping of Circuit Errors in Digital-to-Analog Signal Processing, dated Dec. 18, 1995; Schreier, et al., entitled “Noise-Shaped Multi-bit D/A/ Convertor Employing Unit Elements; Baird, et al., IEEE Transactions on Circuits and System—II: Analog and Digital Signal Processing, Vol. 42, No. 12, entitled “Linearity Enhancement of Multibit &Dgr;&Sgr; A/D and D/A Converters Using Data Weighted Averaging”, dated December 1995; Adams, et al., U.S. Pat. No. 5,404,142, issued Apr. 4, 1995 entitled “Data-Directed Scrambler for Multi-Bit Noise Shaping D/A Converters”; and Williams, ISSCC 98/Session 4/Oversampling Converters/Paper TP4.1, and entitled “An Audio DAC With 90 dB Linearity using MOS to Metal-Metal Change Transfer”. The entire contents of the foregoing are hereby incorporated herein by this reference. However, a practical implementation has not been presented for algorithmically varying mismatched unit elements. Therefore, such an implementation is needed.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the present invention, specific circuit components are proposed for implementing a first order noise shaping apparatus for use in data converters employing thermometer code based DAC elements. In accordance with further aspects of the present invention, mismatched algorithms may be implemented in a first order and higher order noise shaping apparatus in the context of multibit data converters. Moreover, while a preferred embodiment is described in the context of a DAC, the teachings of the present invention may also be applied to ADC's and, indeed, any other application where it is desirable to compensate for mismatched unit elements.
In accordance with an additional aspect of the present invention, a binary addressable “barrel-shifter” is implemented in a pseudo-analog fashion with an array of analog transmission switches that provide low propagation delay and complexity. This barrel-shifter rotates the thermometer code as a function of a characteristic (e.g., magnitude) of the DAC output signal for the previous processing cycle. In accordance with a further aspect of the present invention, the barrel-shifter is implemented using a plurality of two input multiplexors which shift (or rotate) the thermometer code data as a function of the data associated with the previous cycle. In accordance with a further aspect of the present invention, DWA algorithms may be implemented in a manner which uses all of the unit elements at the maximum possible rate while ensuring that each unit element is used the same number of times. In accordance with a further aspect of the present invention, the aforementioned barrel-shifter
Essig Daniel L.
Friend Brian W.
Mocanita Stelian
Conexant Systems Inc.
Jean-Pierre Peguy
Snell & Wilmer L.L.P.
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