Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing
Reexamination Certificate
2007-08-07
2007-08-07
Chang, Jungwon (Department: 2154)
Electrical computers and digital processing systems: multicomput
Computer-to-computer data routing
C370S395310, C370S389000
Reexamination Certificate
active
10151132
ABSTRACT:
The invention is directed to techniques for allocating packets received by the flow control processor located on the input/output (I/O) communications interface of the data communications device to a forwarding entity or session processor, chosen from a plurality of session processors, for further processing or routing. The session processors have the same ability to make decisions relating to the processing and routing of the packet as does the flow control processor and can have per second packet processing rates that are different from the flow control processor located on the I/O communications interface of the data communications device. To allocate the packets to the session processors for further processing, the flow control processor processes information located within the header component of the received packet. Based upon the results of this processing, the flow control processor selects a session processor from a plurality of session processors and transfers the packet to the selected session processor for further processing and routing of the packet. The flow control processor on the I/O communications interface, therefore, acts to load balance incoming packets among other session processors, thereby alleviating potential congestion on the port caused by the reception of multiple packets from multiple clients and reducing potential degradation of performance of the data communications device.To allocate the packets to the session processors for further processing, the flow control processor processes information located within the header component of the received packet. Based upon the results of this processing, the flow control processor selects a session processor from a plurality of session processors and transfers the packet to the selected session processor for further processing and routing of the packet. The flow control processor on the I/O communications interface, therefore, acts to load balance incoming packets among other session processors, thereby alleviating potential congestion on the port caused by the reception of multiple packets from multiple clients and reducing potential degradation of performance of the data communications device.
REFERENCES:
patent: 5864679 (1999-01-01), Kanai et al.
patent: 6032253 (2000-02-01), Cashman et al.
patent: 6058267 (2000-05-01), Kanai et al.
patent: 6230200 (2001-05-01), Forecast et al.
patent: 6351775 (2002-02-01), Yu
patent: 6738378 (2004-05-01), Tuck et al.
patent: 6751646 (2004-06-01), Chow et al.
patent: 6862623 (2005-03-01), Odhner et al.
patent: 6871347 (2005-03-01), Hay
patent: 6883028 (2005-04-01), Johnson et al.
patent: 6904040 (2005-06-01), Salapura et al.
patent: 7002958 (2006-02-01), Basturk et al.
patent: 2002/0191600 (2002-12-01), Shah et al.
patent: 2003/0126291 (2003-07-01), Wang et al.
Krawczyk John J.
Siegel Kenneth P.
Chang Jung-won
Chapin IP Law LLC
Chapin, Esq. Barry W.
Cisco Technology Inc.
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