Methods and apparatus for detecting out-of-range signals in...

Coded data generation or conversion – Converter compensation

Reexamination Certificate

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C341S139000, C341S155000, C341S158000, C341S161000

Reexamination Certificate

active

06741194

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to analog-to-digital converters, and more particularly relates to detecting out-of-range input signals in analog-to-digital converters.
BACKGROUND OF THE INVENTION
Analog-to-digital (AID) converters translate analog signals (such as radio frequency (RF) signals, electrical signals and the like) to digital equivalents that can be stored and/or manipulated by conventional processing components such as memories, microprocessors, digital signal processors, digital logic gates and the like. A/D converters are commonly used in many devices such as wireless phones, RF transmitters/receivers, audio/video components and countless other electronic devices.
One type of commonly-used A/D converter is the redundant signed digit (RSD) converter which uses a “pipeline” of converter stages to extract the various digital bits from an input analog signal. Each RSD stage typically compares the analog signal received at an input with a reference voltage to determine an appropriate digital output (e.g. one or more logical “0” or “1” signals). Depending on the results of the comparison, the analog output is adjusted and/or amplified as appropriate and provided as an input to one or more subsequent stages, which then continue to process the analog signal until the conversion is complete. After the analog signal propagates through the RSD stages, the various digital outputs can be collected and provided as a digital output of the A/D converter. An example of an RSD converter is described in U.S. Pat. No. 5,644,313.
Although RSD converters are generally effective at converting analog signals to digital equivalents, problems can arise if the converter receives an analog input that is beyond the input range of the converter. If the analog input has a magnitude that exceeds the limits of the converter, the excessive portion may become amplified as the signal propagates through the RSD stages until the one or more stages becomes saturated with an overly large analog input. If one or more stages becomes saturated, the speed of the converter can be dramatically reduced as the saturated stage(s) take time to recover. Moreover, the accuracy of the digital output produced by an out-of-range signal may be compromised until the saturated RSD stage(s) are able to recover.


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Lewis, S. H. et al., “A 10-b 20-Msample/s Analog-to-Digital Converter”, IEEE Journal of Solid-State Circuits, vol. 27, No. 3, Mar. 1992, pp. 351-358.

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