Methods and apparatus for delay circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S276000

Reexamination Certificate

active

06930525

ABSTRACT:
An electronic system includes a deskewing circuit configured to measure a delay and generate a synchronized signal according to the measured delay. The deskewing circuit may be configured to detect an overflow condition and respond accordingly, for example by asserting an overflow signal. Further, the deskewing circuit may be additionally or alternatively configured to detect successful measurement of the delay and respond, for example by executing a power saving and/or noise reducing procedure.

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Article entitled “A Low-Jitter Mixed-Mode DLL for High-Speed DRAM Applications” by Jae Joon Kim, Sang-Bo Jung, Chang-Hyun Kim, Soo-In Cho and Beomsup Kim, IEEE Journal of Solid-State Circuits, vol. 35, No. 10, Oct. 2000.
Article entitled “A Registered-Controlled Symmetrical DLL for Double-Data-Rate DRAM” by Feng Lin, Jason Miller, Aaron Schoenfield, Manny Ma and R. Jacob Baker, IEEE Journal of Solid-State Circuits, vol. 34, No. 4, Apr. 1999.

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