Data processing: measuring – calibrating – or testing – Measurement system – Performance or efficiency evaluation
Reexamination Certificate
2007-05-29
2007-05-29
Barlow, Jr., John E. (Department: 2863)
Data processing: measuring, calibrating, or testing
Measurement system
Performance or efficiency evaluation
Reexamination Certificate
active
10730388
ABSTRACT:
A method and apparatus for data analysis according to various aspects of the present invention is configured to automatically identify a characteristic of a fabrication process for components based on test data for the components.
REFERENCES:
patent: 4109511 (1978-08-01), Powers, Jr. et al.
patent: 5130936 (1992-07-01), Sheppard et al.
patent: 5240866 (1993-08-01), Friedman et al.
patent: 5495417 (1996-02-01), Fukuda et al.
patent: 5539652 (1996-07-01), Tegethoff
patent: 5694325 (1997-12-01), Fukuda et al.
patent: 5787190 (1998-07-01), Peng et al.
patent: 5835891 (1998-11-01), Stoneking
patent: 5892949 (1999-04-01), Noble
patent: 5956251 (1999-09-01), Atkinson et al.
patent: 5966527 (1999-10-01), Krivokapi et al.
patent: 6182022 (2001-01-01), Mayle et al.
patent: 6184048 (2001-02-01), Ramon
patent: 6279146 (2001-08-01), Evans et al.
patent: 6300772 (2001-10-01), Brown et al.
patent: 6338148 (2002-01-01), Gillenwater et al.
patent: 6442499 (2002-08-01), Gorin
patent: 6477685 (2002-11-01), Lovelace
patent: 6516309 (2003-02-01), Eberhart
patent: 6787379 (2004-09-01), Madge et al.
patent: 6807655 (2004-10-01), Rehani et al.
patent: 6939727 (2005-09-01), Allen, III et al.
patent: 6943042 (2005-09-01), Madge et al.
patent: 2002/0054694 (2002-05-01), Vachtsevanos et al.
patent: 2003/0014205 (2003-01-01), Tabor
patent: 2003/0140287 (2003-07-01), Wu et al.
patent: 2003/0144810 (2003-07-01), Tabor
patent: 1067392 (2000-06-01), None
“Automatically Analyzing Effects of Process Equipment on Yield”, http://www.semiconductor.net/semiconductor/issues/issues/1999/aug99/docs/yield.asp, 1999.
“Capability Ratios Vary”, http://www.qualitydigest.com/june97/html/capablty.html, Jun. 1997.
“Using SPC in Batch Processes” http://www.qualitydigest.com/mar98/html/spcbatch.html, Mar. 1998.
“Splitting Wafer Lots in Semiconductor Manufacturing, Part III: Comparing Two Processes—A Better Approach,” http://www.semiconductoronline.com/content
ews/article.asp?DocID={66EE75EA-372B-11D4-8C3D=009027DE0829}&Bucket=Features&V, May 31, 2000.
“Technique Closes the Loop on Test System Uncertainty,” http://www.tmworld.com/articles/05—1999—Technique—Loop.htm, May 1999.
“How Much Measurement Error is Too Much? Part I: Modelling Measurement Data,” http://www.testandmeasurement.com/content
ews/article.asp?DocID={592878CF-FC4E-11D3-8C2C-009027DE0829}&Bucket=HomeFeaturedArticles, Mar. 20, 2000.
Singh Et al., Screening for Known Good Die (KGD) Based on Defect Clustering: An Experimental Study, IEEE.
Singh, Position Statement: Good Die in Bad Neighborhoods, IEEE.
Miller, Position Statement: Good Die in Bad Neighborhoods, IEEE.
Roehr, Position Statement: Good Die in Bad Neighborhoods, IEEE.
Mann, “Leading Edge” of Wafer Level Testing.
Michelson, Statistically Calculating Reject Limits at Parametric Test, IEEE.
Sabade et al., Immediate Neighbor Difference IDDQ Test (INDIT) for Outlier Detection, Dept. of Computer Science—Texas A&M University.
Huang, et al., Image Processing Techniques for Wafer Defect Cluster Identification, IEEE.
Sabade, et al., Use of Multiple IDDQ Test Metrics for Outlier Identification, Dept. of Computer Science—Texas A&M University.
Chen, et al., A Neural-Network Approach to Recognize Defect Spatial Pattern in Semiconductor Fabrication, IEEE.
Sapozhnikova, et al., The Use of dARTMAP and FUZZY ARTMAP to Solve the Quality Testing Task in Semiconductor Industry, IEEE.
Sikka, Automated Feature Detection & Characterization in Sort Wafer Maps.
Hansen, et al., Process Improvement Through the Analysis of Spatially Clustered Defects on Wafer Maps.
Denby, et al., A Graphical User Interface for Spatial Data Analysis in Integrated, Circuit Manufacturing, AT&T Bell Laboratories.
Friedman, et al., Model-Free Estimation of Defect Clustering in Integrated Circuit Fabrication.
Hansen, et al., Monitoring Wafer Map Data From Integrated Circuit Fabrication Processes for Spatially Clustered Defects.
Xu, Statistical Problems in Semiconductor Manufacturing.
Thomas Gnieting, Measurement Related and Model Parameter Related Statistics.
Agilent PDQ-WLR(tm) Test and Analysis Software Environment—Product Note, Agilent Technologies, 2000.
Advance Parametric Tester with HP SPECS, Hewlett-Packard Company, 1999.
Jeff Chappell, LSI Applies Statistics to Defectivity, Apr. 14, 2003 (http://www.reed-electronics.com/electronicnews/index.asp?layout=articlePrint&articleID=CA292185).
Erik Jan Marinissen, et al., Creating Value Through Test, IEEE 2003, 1530-1591.
Russell B. Miller, et al., Unit Level Predicted Yield: a Method of Identifying High Defect Density Die at Wafer Sort, IEEE 2001, 1118-1127.
Philippe Lejeune, et al., Optimizing Yield vs. DPPM for Parts Average Testing, www.galaxysemi.com.
Emilio Miguelanez, et al., Advanced Automatic Parametric Outlier Detection Technologies for the Production Environment.
Guidelines for Part Average Testing, Automotive Electronics Council, AEC-Q001-Rev-C Jul. 18, 2003.
Zinke, Kevin, et al. Yield Enhancement Techniques Using Neural Network Pattern Detection, IEEE 1997, 211-215.
Lejeune, Philippe et al., Minimizing Yield Loss with Parts Average Testing (PAT) and Other DPM Reduction Techniques, Tetradyne Users Group, 2006.
Lejeune, Philippe et al., Minimizing Yield Loss with Parts Average Testing (PAT) and Other DPM Reduction Techniques (PRESENTATION), Tetradyne Users Group, 2006.
Defecter(tm)II—Defect Data Analysis Software, Semicon.
Stanley, James, Spatial Outlier Methods for Detecting Defects in Semiconductor Devices at Electrical Probe, Motorola.
Ratcliffe, Jeff, Setting a Nearest Neighbor IDDQ Threshold.
Daasch, Robert, Variance Reduction Using Wafer Patterns in Iddq Data, Proceeding of International Test Conference Oct. 2000, pp. 189-198.
Daasch, Robert, Neighbor Selection for Variance Reduction in Iddq and Other Parametric Data, ITC International Test Conference, IEEE 2001.
Applewhite. The view from the top. IEEE Spectrum, 41(II (INT)):18-31, Nov. 2004.
Canulo, M. Fairhurst and G. Howells, (2001) Improving ARTMap learning through variable vigilance. International Journal of Neural Systems, vol. 11, No. 6, pp. 509-522.
Carpenter, G. A. and S. Grossberg, (1998) The ART of adaptive pattern recognition by self-organization neural network. Computer, vol. 21, No. 3, pp. 77-88.
K. Chang and J. Ghosh. Principal Curve Classifier—A nonlinear approach to pattern classification. In IEEE World Congress on Computational Intelligence, Neural . . . May 1998.
M. Clerc and J. Kennedy. The particle swarm—explosion, stability, and convergence in a multidimensional complex space. IEEE Transaction on Evolutionary Computation, Feb. 2002.
R. C. Eberhart and J. Kennedy, “A new optimizer using particle swarm theory”, in Proc. 6th Intl. Symposium on Micro Machines and Human Science, Nagoya, Japan, IEEE 1995.
R. C. Eberhart and Y. Shi. Evolving Artificial Neural Networks. In International Conference on Neural Networks and Brain, pp. PL5-PL13, Beijing, P.R. China, 1998.
R. C. Eberhart and X. Hu, “Human Tremor analysis using particle swarm optmization”, in Proc. Congress on Evolutionary Computation 1999, IEEE Service Center, pp. 1927-1930.
R.C. Eberhart and Y. Shi, “Comparing inertia weight and constriction factors in particle swarm optimization”, in Proc. of the Congress of Evolutionary Computation, 2000.
F. Chen and S. Liu, “A Neural-Network Approach To Recognize Defect Spatial Pattern in Semiconductor Fabrication”, IEEE Transactions on Semiconductor Manufacturing,v.13 2000.
T. Fountain, T. Dietterich, and B. Sudyka. Mining IC test data to optimize VLSI testing. the 6th ACM SIGKDD International Conference pp. 18-25, 2000.
N. Franken and A.P. Engelbrecht. Comparing PSO structures to learn the game of checkers from zero knowledge. In Congress on Evolutionary Computation, vol. 1, Dec. 2003.
F. van den Bergh and A. P. Engelbrecht, “Cooperative Learning In Neural Net
Buxton Paul M.
Martin Emilio Miguelanez
Tabor Eric Paul
Zalzala Ali M. S.
Barlow Jr. John E.
Khuu Cindy D.
Noblitt & Gilmore LLC
Test Advantage, Inc.
LandOfFree
Methods and apparatus for data analysis does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods and apparatus for data analysis, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatus for data analysis will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3734474