Methods and apparatus for automated testbench generation

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

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C716S104000

Reexamination Certificate

active

08065128

ABSTRACT:
Methods and apparatus are provided for efficiently generating designs for testing design automation tools and applications. Randomized and diverse test designs with realistic attributes are automatically generated to allow comprehensive testing of design automation tools such as synthesis, simulation, and place and route tools used to implement designs on electronic devices. Each test design can incorporate a wide range of attributes to allow thorough integration testing of a design automation tool.

REFERENCES:
patent: 5754760 (1998-05-01), Warfield
patent: 5805795 (1998-09-01), Whitten
patent: 6053947 (2000-04-01), Parson
patent: 6189116 (2001-02-01), Mongan et al.
patent: 6269467 (2001-07-01), Chang et al.
patent: 6334207 (2001-12-01), Joly et al.
patent: 6378088 (2002-04-01), Mongan
patent: 6477691 (2002-11-01), Bergamashi Rab et al.
patent: 6678645 (2004-01-01), Rajsuman et al.
patent: 6907550 (2005-06-01), Webster et al.
patent: 7085702 (2006-08-01), Hwang et al.
patent: 2002/0038401 (2002-03-01), Zaidi et al.
patent: 2003/0139906 (2003-07-01), Barford
patent: 2004/0015739 (2004-01-01), Heinkel et al.
patent: 2004/0015792 (2004-01-01), Kubista
patent: 2004/0210798 (2004-10-01), Higashi
Goossens et al. “Design of heterogeneous ICs for mobile and personal communication systems”, Nov. 1994, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, pp. 524-531.
Altera Corp., “ASIC to FPGA Design Methodology & Guidelines” Jul. 2003, ver 1.0, pp. 1-58.
Bening et al. “Optimizing Multiple EDA Tools within the ASIC Design Flow”, 2001, IEEE, IEEE Design & Test of Computers, pp. 46-55.
Dustin, Elfriede. “Chapter 7, Automated Testing Tools”, Effective Software Testing: 50 Specific Ways to Improve Your Testing, Dec. 18, 2002, 6 pages.
Hutton et al., “The Circuit Characterization and Generation Project at the University of Toronto”, www.eecg.toronto.edu/˜mdhutton/gen/ downloaded Sep. 8, 2003.
Synopsys Products & Solutions, Design Platforms, www.synopsys.com/products/products.html site modified Aug. 1, 2003, downloaded Sep. 8, 2003.

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