Data processing: structural design – modeling – simulation – and em – Electrical analog simulator – Of electrical device or system
Reexamination Certificate
1998-12-01
2002-05-14
Frejd, Rrussell W. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Electrical analog simulator
Of electrical device or system
C703S002000, C716S030000
Reexamination Certificate
active
06389377
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to signal processing and, more particularly, to a mixed-mode very-large-scale integration (VLSI) architecture and methods for real-time classification of acoustic transients.
Acoustic transients, short, impulsive bursts of acoustic energy that last between 10 and 100 ms, are a rich source of information in the natural world, and the ability to process them in real time provides a competitive advantage to species. As a result, humans, like other animals, have evolved the ability to quickly and economically process acoustic transients.
In the digital world of algorithms and computers, analogous evolutionary forces have caused engineers to develop powerful digital signal processing (DSP) algorithms for classification of acoustic signals on fast DSP engines. Using modern signal processing techniques to recognize acoustic transients in real time is straightforward on modern processors. The challenge of extracting information from signals has been met by powerful mathematical techniques such as wavelet analysis and hidden Markov models. The need for real-time performance has been met by fast and powerful central processing units (CPUs) and special-purpose DSP chips.
Despite the above, a closer look at the DSP solutions reveals that the burden of real-time processing is borne by increasingly powerful digital processors. The price for success is measured in terms of power dissipation and complexity. Power dissipation scales linearly with the processor's clock rate. Thus, all else being equal, a 100-MHz processor dissipates 1000 times more power than a 100-kHz processor. Each bump up in clock rate requires increasingly heroic methods to control power dissipation.
Complexity can be measured by the number of cycles required to perform a calculation and by the surface area of the chip. Increasingly complex algorithms create pressure to increase the complexity of the processor and thus the area of a chip. The problem of greater chip area can be overcome by scaling down the feature size of the fabrication process, but scaling also has physical limits. Moreover, as the feature size scales down, the fabrication process itself becomes more difficult and exacting.
All of this contrasts sharply with nature's solution. The characteristics and advantages of nature's acoustic processing algorithms are well documented. Natural systems process acoustic information in real time, with precision and reliability, while dissipating minuscule amounts of energy. Nature accomplishes this with slow and unreliable devices, i.e., neurons. Biological hardware has no clock but typical time scales are measured in fractions of milliseconds. In effect, biological hardware runs at a 1- to 10-kHz clock rate.
If it were possible to engineer acoustic processors with biological levels of performance and power requirements, a large number of new applications would become feasible. Intelligence based on acoustic pattern recognition could be built into appliances, telephones, and credit cards. Cellular phones could take spoken commands. Smart credit cards could recognize not only passwords, but also the speaker. Digital watches and calculators that run for years on button cells could understand a small vocabulary of spoken words. Self-diagnosing machines could recognize acoustic transients caused by state changes and wear.
Motivated by the observation that biological systems perform very sophisticated tasks while making low demands on power consumption and component precision, artificial devices can be developed that perform as competently as biological systems while requiring minimal resources. The long-term goal is to build pattern recognition engines whose performance characteristics rival those of biological systems. To be more specific, acoustic processing engines with the following characteristics can be built:
Real-time operation, so that typical transients are recognized in about 100 ms or less.
High correct classification rates (near 95%) on hundreds of transient classes while achieving low false alarm rates.
Implementation of such engines with the highly mismatched metal-oxide-silicon (MOS) transistors that are typical in modern analog VLSI fabrication processes (feature size <1.2 &mgr;m).
Power dissipation on the order of a milliwatt or less. This requires subthreshold current-mode circuits. Currents in such circuits are in the 0.1- to 10-nA range, while voltage swings are in the 100-mV range. Clock rates will be tens of kilohertz or less.
One solution to the above would be a practical architecture for performing real-time recognition of acoustic transients by means of a correlation-based algorithm. In other words, the algorithm would perform pattern recognition by correlating an incoming signal with a stored template. However, correlation-based algorithms are generally believed to be so computationally intensive that they cannot be used for real-time applications except in conjunction with fast DSP chips.
Traditionally, correlation in analog VLSI poses two fundamental implementation challenges: first, the problem of template storage; second, the problem of accurate analog multiplication. Both problems can be solved by building sufficiently complex circuits. For example, analog values can be stored by sample-and-hold circuits or by storing digital values and converting them into analog values via digital-to-analog converters. These solutions are generally inferior to digital correlation algorithms because they lead to analog processors that are large compared with their digital counterparts.
Another, more compact solution to the template storage problem is to employ the recently developed floating gate devices. Presently, such devices can store precise analog values for years without significant degradation. Moreover, this approach can result in very compact devices. Unfortunately, programming floating gate devices is not particularly easy. It is relatively slow and requires high voltage. Furthermore, the floating gate degrades each time it is reprogrammed. The fabrication of high-quality floating gates also requires advanced fabrication processes that may not be compatible with circuits for other kinds of on-chip processing.
Finally, even if the analog storage problem could be solved effectively, the problem of building accurate analog-analog multipliers remains. High-quality analog multipliers are notoriously difficult to build. Effective solutions require considerable area on the chip.
One solution to the above problems is to sidestep them completely and to develop an algorithm and architecture that require neither analog storage nor analog multiplication. One instance of this approach is to binarize the input and then to correlate it with a binary template. Thus, the correlations can be performed by simple “XOR” gates. This approach is compact and fast. Thus, there remains a need for analog VLSI devices for real-time classification of acoustic transients that provide a high level of classification and are small and relatively simple to build.
SUMMARY OF THE INVENTION
The above problems are solved by the invention, a hybrid approach that replaces analog-analog multiplication with analog-binary multiplication. In mixed-mode hardware this operation corresponds to simple binary multiplexing. The algorithm and architecture of the invention are expected to perform a correlation calculation on a special-purpose parallel analog VLSI chip, using a slow clock (about 10 kHz) and with just a few milliwatts of power dissipation.
Many time-based classification systems compute the correlation of an incoming discrete-time signal or signals with a predetermined template. While for speech and other complex long-term signals it is necessary to perform dynamic time warping (DTW) or similar weighting of the incoming signal, for transients, a simple correlation in the time-frequency domain yields accurate classification results.
A general form of the simple correlation is
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Cauwenberghs Gert
Edwards R. Timothy
Pineda Fernando J.
Cooch Francis A.
Frejd Rrussell W.
The Johns Hopkins University
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