Methods and apparatus for a non-volatile memory device with...

Static information storage and retrieval – Floating gate – Disturbance control

Reexamination Certificate

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C365S185250, C365S189020

Reexamination Certificate

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11370368

ABSTRACT:
A non-volatile memory device includes a plurality of power control circuits interfaced via a single Y multiplexer with an array of memory cells. The multiple power control circuits provide multiple pre-charge paths configured to pre-charge the drain node of a target memory cell in the array, as well as the drain and/or source nodes of unselected memory cells in the array. The multiple pre-charge paths decrease the current through the array cells and also decrease the pre-charge and set up times for the array.

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