Methods and apparatus for a digital pulse width modulator...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control

Reexamination Certificate

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C327S291000

Reexamination Certificate

active

07439787

ABSTRACT:
A pulse width modulation circuit includes a first delay-locked loop (DLL) circuit and a second DLL circuit. The first DLL is coupled to a first multiplexer and has a first set of delay stages, wherein the first DLL circuit is configured to receive an input clock signal and, through the first multiplexer, produce a first stage delay signal associated with the first set of delay stages, wherein the first stage delay signal leads the input clock signal by a first duration. The second DLL circuit is coupled to a second multiplexer and has a second set of delay stages, wherein the second DLL circuit is configured to receive the input clock signal and, through the second multiplexer, produce a second stage delay signal associated with the second set of delay stages, wherein the second stage delay signal lags the first stage delay signal by a second duration; wherein the first DLL circuit and second DLL circuit are operatively coupled to produce an output signal having a pulse width equal to the difference between the first duration and the second duration.

REFERENCES:
patent: 6452432 (2002-09-01), Kim
patent: 6750688 (2004-06-01), Takai
patent: 6798258 (2004-09-01), Rieven
patent: 7154978 (2006-12-01), Juan et al.
patent: 7202719 (2007-04-01), Gabato et al.
patent: 2006/0022736 (2006-02-01), Gregorius
Bartoni, F., et al, “A High-Resolution DLL Based Digital-To-Time Converter for DDS Applications”, IEEE International Frequency Control Symposium and PDA Exhibition, 2002, p. 649-653.

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