Method using receive and transmit protocol aware logic...

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing

Reexamination Certificate

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C710S052000

Reexamination Certificate

active

10458530

ABSTRACT:
The invention provides a low-cost, high-bandwidth file server, which is implemented in a single integrated semiconductor. High-bandwidth is achieved through the use of a shared memory buffer, protocol aware logic, and a modified network stack. The shared memory buffer allows data flow from the network to the storage device without the need of a single copy. The protocol aware logic and modified network stack also greatly improves bandwidth, while decreasing the processor workload. Another improvement allows for a smaller processor that can run at slower clock speeds, and thus requires far less silicon while using far less power than the traditional approach.

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patent: 2004/0030754 (2004-02-01), Ree

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