Method to switch MOSFETs using recycled, parasitic energy

Details Method to switch MOSFETs using recycled, parasitic energy Method to switch MOSFETs using recycled, parasitic energy

2000-06-06

2001-09-04

Han, Jessica (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C363S133000

Reexamination Certificate

active

06285173

ABSTRACT:

RELATED PATENT APPLICATIONS
This application is related to U.S. Patent Application entitled High Efficiency Switching DC—DC Regulator appln Ser. No. 09/588,399 filed on Jun. 2, 2000, by Ariel S. Bentolila and Sisan Shen.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to MOSFET switching methods, and more particularly to an energy efficient gate drive method for MOSFET switching systems comprising of at least one NMOS FET and at least one PMOS FET connected in a totempole, binary push-pull, configuration having a common switch node with inductive and capacitive elements connected to this common switch node. These energy storage elements on the common switch node can be parasitic in nature or discrete components.
2. Description of the Prior Art
The standard MOSFET switch mode power converter configuration has the output FET's gate drive energy source connected to the power supply. The result of this standard configuration is to take energy from the power supply to turn on the NMOS and to turn off the PMOS, and to ground energy stored in the gate capacitance of these MOSFETs when switching their conduction states. Known structures inefficiently switch totem-pole configured MOSFETs by failing to recognize that a substantial amount energy necessary to turn a FET on could be provided by otherwise wasted energy stored in inductive and capacitive elements on the common switch node of the totem-pole connected FETs. In view of the foregoing, a need exists for a technique to configure the gate drive of binary output MOSFETs to provide an energy efficient gate drive method for MOSFET switching systems comprising of at least one NMOS FET and at least one PMOS FET connected in a totem-pole, binary push-pull, configuration having a common switch node with inductive and capacitive elements connected to this common switch node; and wherein these energy storage elements on the common switch node can be parasitic in nature or discrete components.
SUMMARY OF THE INVENTION
The present invention is directed to totem-pole configured binary output MOSFETs capable of switching a binary voltage at their common switch node. The gate drive signals are like those for a typical binary output stage; however, the gate drive power source for the output FET turn on is derived from the output FET's common switch node, instead of from the system power supply.
In one aspect of the present invention, a MOS-based switch mode power converter has the gate drive of the output FET devices configured such that the on-time gate drive switching device is connected to the output switch node. The off-time gate switching devices are connected as in standard switch mode power converters familiar to those skilled in the switching converter art.
The effect of this configuration is to provide a path to transfer energy to the output switch node energy storage elements when turning on the output PMOS, and to acquire energy from the output switch node energy storage elements when turning on the output NMOS.


REFERENCES:
patent: 5319260 (1994-06-01), Wanlass
patent: 5457624 (1995-10-01), Hastings
patent: 5973368 (1999-10-01), Pearce et al.

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