Method to remove particulate contamination from a solution bath

Details Method to remove particulate contamination from a solution bath Method to remove particulate contamination from a solution bath

2003-01-10

2004-09-28

El-Arini, Zeinab (Department: 1746)

Cleaning and liquid contact with solids

Processes

Including application of electrical radiant or wave energy...

C134S001000, C134S002000, C134S003000, C134S026000, C134S028000, C134S029000, C134S902000

Reexamination Certificate

active

06796315

ABSTRACT:

FIELD OF THE INVENTION
This invention generally relates to semiconductor wafer manufacturing and more particularly to methods for cleaning semiconductor manufacturing tools such as a solution bath to remove particulate contamination and maintain a particulate free solution bath to prevent contamination of semiconductor process wafers.
BACKGROUND OF THE INVENTION
In creating a multiple layer (level) semiconductor device on a semiconductor wafer, each layer making up the device may be subjected to one or more deposition processes, for example using chemical vapor deposition (CVD) or physical vapor deposition (PVD), and usually including one or more dry etching processes. A critical condition in semiconductor manufacturing is the absence of particulates on the wafer processing surface, since microscopic particles may interfere with and adversely affect subsequent processing steps leading to device degradation and ultimately semiconductor wafer rejection.
While the wafer cleaning process has been always been a critical step in the semiconductor wafer manufacturing process, ultraclean wafers are becoming even more critical to device integrity. For example, as semiconductor feature sizes decrease, the detrimental affect of particulate contamination increases, requiring removal of ever smaller particles. For example, particles as small as 5 nm may be unacceptable in many semiconductor manufacturing processes. Further, as the number of device layers increase, for example to 5 to 8 layers, there is a corresponding increase in the number of cleaning steps and the potential for device degradation caused by particulate contamination. To adequately meet requirements for ultraclean wafers in ULSI and VLSI the wafer surface must be essentially free of contaminating particles.
Another factor in modern processing technology that increases the incidence of particle contamination is the deposition of carbon doped oxides as IMD layers to achieve dielectric constants of less than about 3.0. The IMD layers are typically deposited by a plasma enhanced CVD (PECVD), low pressure CVD (LPCVD) or high density plasma CVD (HDP-CVD). In these processes, a degree of sputtering occurs as the layer of material is deposited causing a higher degree of particulate contamination as the deposition time increases. In addition, PVD processes are typically used to deposit films of metal, for example barrier/adhesion layers within anisotropically etched features or for metal filling an anisotropically etched feature. PVD processes tend to coat the inner surfaces of the processing chamber with a metal film, flaking off to contaminate a wafer process surface as the metal film increases in thickness and are subjected to cyclic thermal stresses. Other processes that frequently resulting particulate contamination include plasma etching processes where a photoresist layer is etched away during an ashing process. Over time, the buildup of ashing residue within a plasma etching chamber increases the probability that a semiconductor wafer will become contaminated by particulates.
Particulate contamination may cause ‘killer defects’ resulting in integrated circuit opens or shorts by occluding a portion of a circuit or providing a shorting path between two conductive lines of a circuit.
Typically, to reduce processing times and increase throughput, in prior at processes, ex-situ cleaning processes are performed following particle generating processes such as plasma etching or PECVD film deposition. For example, common particle removal mechanisms which may be exploited, depending on the particle and how it adheres to the surface, include oxidizing degradation and dissolution, physical removal by etching, and electrical repulsion between a particle and the wafer surface.
Standard wafer cleaning processes typically employ a dipping process whereby a plurality (batch) of process wafers are dipped sequentially in a series of solution baths. For example a wafer cleaning process to remove particulate contamination may typically include a first chemical bath followed by a de-ionized water bath followed by a drying bath. Megasonic cleaning process have been used in the prior art in the chemical bath cleaning stage. One limitation of using megasonic agitation for cleaning wafers can be the tendency of detached particulates to reattach due to insufficient agitation. For example megasonic agitation in cleaning wafers including frequencies higher than about 800 kHz is used to minimize wafer pitting caused at lower frequencies. A deionized water (DIW) rinsing step invariably follows the chemical bath cleaning stage to neutralize the etching action by chemicals included in the chemical bath and to remove residual or reattached residual particles. However, a shortcoming of a cleaning process where the chemical bath stage is followed by a DIW rinse, for example DIW bath, and a subsequent drying process, is that the DIW rinsing step alters the zeta potential of the residual particulates favoring accumulation of particulates, particularly organic polymer particulates, on the wafer carrier and the DIW bath surface. Over time, as particulates accumulate, the zeta potential of the particulates in the DIW bath surface changes to favor reattachment to the wafer surface, requiring frequent preventive maintenance cleaning of the DIW bath and wafer carrier to prevent particulate contamination of subsequently processed wafers. Such preventative maintenance cleaning is time consuming and frequently requires costly shutdown of the wafer production line.
There is therefore a need in the semiconductor wafer processing art to provide an improved method for cleaning solution baths used in wafer cleaning processes to reduce preventative maintenance and improve wafer cleaning results.
It is therefore an object of the invention to provide an improved method for cleaning solution baths used in wafer cleaning processes to reduce preventative maintenance and improve wafer cleaning results while overcoming other shortcomings and deficiencies of the prior art.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects, and in accordance with the purposes of the present invention, as embodied and broadly described herein, the present invention provides a method of cleaning particulates from a solution bath.
In a first embodiment, the method includes at least partially filling a deionized water (DIW) bath for rinsing at least one wafer following chemically cleaning the at least one wafer; rinsing the at least one wafer; transferring the at least one wafer to a downstream process; at least partially draining the DIW from the DIW bath; at least partially filling the DIW bath with a bath cleaning solution; and, applying at least one source of ultrasonic energy to agitate the bath cleaning solution.
These and other embodiments, aspects and features of the invention will be better understood from a detailed description of the preferred embodiments of the invention which are further described below in conjunction with the accompanying Figures.


REFERENCES:
patent: 5837662 (1998-11-01), Chai et al.
patent: 6596148 (2003-07-01), Belongia et al.
patent: 2003/0211427 (2003-11-01), Tseng et al.

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