Method to reduce junction leakage current in strained...

Details Method to reduce junction leakage current in strained... Method to reduce junction leakage current in strained...

2005-01-25

2005-01-25

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S296000, C438S425000

Reexamination Certificate

active

06846720

ABSTRACT:
A MOSFET device in strained silicon-on-SiGe and a method of forming the device are described. The said device achieves reduced junction leakage due to the lower band-gap values of SiGe. The method consists of forming isolation trenches in a composite strained-Si/SiGe substrate and growing a liner oxide by wet oxidation such that oxidation is selective to SiGe only, with negligible oxidation of silicon surfaces. Selective oxidation results in oxide encroachment under strained-Si, thereby reducing the junction area after device fabrication is completed. Reduced junction area leads to reduced n+/p or p+
junction leakage current.

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J.G. Spooner,IBM reveals new strain of chip power, CNET News.com, Jun. 8, 2001.

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