Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
1998-09-03
2002-05-07
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S253000
Reexamination Certificate
active
06383886
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to integrated circuits and more particularly to a method for fabricating dual-sided container capacitors for such circuits.
BACKGROUND OF THE INVENTION
Capacitors are used in a wide variety of integrated circuits. Capacitors are of special concern in DRAM (dynamic random access memory) circuits; therefore, the invention will be discussed in connection with DRAM memory circuits. However, the invention has broader applicability and is not limited to DRAM memory circuits. It may be used in other types of memory circuits, such as SRAMs, as well as any other circuit in which capacitors are used.
DRAM memory circuits are manufactured by replicating millions of identical circuit elements, known as DRAM cells, on a single semiconductor wafer. A DRAM cell is an addressable location that can store one bit (binary digit) of data. In its most basic form, a DRAM cell consists of two circuit components: a storage capacitor and an access field effect transistor.
There is continuous pressure in the industry to decrease the size of individual cells and increase memory cell density to allow more memory to be squeezed onto a single memory chip. However, it is necessary to maintain a sufficiently high storage capacitance to maintain a charge at the refresh rates currently in use even as cell size continues to shrink. This requirement has led DRAM manufacturers to turn to three dimensional capacitor designs, including trench and stacked capacitors.
Stacked capacitors are capacitors which are placed over the access transistor in a semiconductor device. In contrast, trench capacitors are formed in the substrate beneath the transistor. For reasons including ease of fabrication and increased capacitance, most manufacturers of DRAMs larger than 4 Megabits use stacked capacitors. Therefore, the present invention will be discussed in connection with stacked capacitors, but should not be understood to be limited thereto.
One widely used type of stacked capacitor is known as a container capacitor. Known container capacitors are in the shape of an upstanding tube (cylinder) with an oval or circular cross section. The wall of the tube consists of two electrodes, i.e., two plates of conductive material, such as doped polycrystalline silicon (referred to herein as polysilicon or poly), separated by a dielectric. The bottom end of the tube is closed, with the outer wall in contact with either the drain of the access transistor or a plug which itself is in contact with the drain. The other end of the tube is open. The sidewall and closed end of the tube form a container; hence the name “container capacitor.”
One type of container capacitor is a “dual-sided” capacitor. A dual-sided container capacitor is a capacitor in which the bottom electrode forms a container, and the dielectric and top electrode layers cover not only the bottom electrode on the inside of the container but also cover at least a portion of the outside of the container walls. This dual-sided configuration enhances the efficiency of container capacitors by increasing the capacitance for a given container cell area.
Although container capacitors improved upon planar capacitors, they are not without their problems. During the fabrication of the bottom electrode layer of a dual-sided container capacitor, it is not uncommon that residual conductive material such as polysilicon may remain on the substrate around the edge of the container. These polysilicon residues, sometimes called floaters, are conductive and, thus, can cause floating grain defects, i.e., short circuits between adjacent container capacitors in the memory array. A typical container capacitor array which suffers from a floating grain defect problem, causing a short circuit between two capacitors, is shown in FIG.
1
. What is needed is a method for fabricating dual-sided container capacitors which reduces or eliminates floating grain defects.
SUMMARY OF THE INVENTION
The present invention provides a method for fabricating dual-sided container capacitors, which minimizes or prevents floating grain defects, as shown in FIG.
2
. According to the method of the present invention, after forming a container opening and a bottom electrode, the container is filled with photoresist or other fill material. Chemical mechanical planarization is then performed to isolate the bottom electrode. Adjacent insulative material is not removed to expose the outside of the bottom electrode, however, until after removal of the fill material. By removing the fill material first, and then etching back the insulative material, any remaining floating conductive grains from the fill material removal step settle on the surface of the insulative material. When the insulative material is subsequently removed, so are the remaining conductive grains and, thus, floating grain defects are prevented or minimized. A capacitor dielectric layer and a top electrode layer are then deposited to complete the dual-sided container capacitor.
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patent: 5956587 (1999-09-01), Chen et al.
patent: 6015733 (2000-01-01), Lee et al.
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Dickstein , Shapiro, Morin & Oshinsky, LLP
Nguyen Tuan H.
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