Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1999-01-26
2000-07-11
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438744, H01L 2100
Patent
active
060872683
ABSTRACT:
A gate electrode of a MOS transistor wherein gate oxide 12 is placed over substrate 10. Boron-doped polysilicon gate electrode 14 is placed over gate oxide 12. Optionally, drain extender implants may be added to substrate 10. Low-temperature-deposited nitride layer 18 is placed over gate electrode 14 and gate oxide 12. The structure then undergoes a sidewall spacer etch to form sidewall spacers 20.
REFERENCES:
patent: 5756216 (1998-05-01), Becker et al.
patent: 5965462 (1999-10-01), Tan et al.
patent: 6025255 (2000-02-01), Chen et al.
Grider Douglas T.
Holloway Thomas C.
Hoel Carlton H.
Powell William
Telecky Jr. Frederick J.
Texas Instruments Incorporated
Valetti Mark A.
LandOfFree
Method to reduce boron diffusion through gate oxide using sidewa does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method to reduce boron diffusion through gate oxide using sidewa, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method to reduce boron diffusion through gate oxide using sidewa will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-542002