Method to reduce aspect ratio of DRAM peripheral contact

Details Method to reduce aspect ratio of DRAM peripheral contact Method to reduce aspect ratio of DRAM peripheral contact

1999-02-09

2000-12-26

Thomas, Tom

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438253, 438306, 438310, 438620, 438634, 438672, 438756, 438618, 257306, H01L 2120

Patent

active

061658677

ABSTRACT:
The present invention provides a method for reducing aspect ratio of DRAM peripheral contact so as to achieving a good contact etching and metal deposition by utilizing conventional equipment. Besides, the present invention provides a stop layer formed by a nitride layer to reduce the volcano effect resulted from the misalignment between stacked contacts. Furthermore, the present invention is capable of etching poly layer and oxide layer in a single step, whereby the height of the peripheral contact is substantially the same as, or lower than, the contact of the storage node of a capacitor. Therefore, the aspect ratio of DRAM peripheral contact can be reduced.

REFERENCES:
patent: 5414655 (1995-05-01), Ozaki et al.
patent: 5804479 (1998-09-01), Aoki et al.
patent: 5895239 (1999-04-01), Jeng et al.
patent: 5918120 (1999-06-01), Huang et al.

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