Method to provide link grouping in a packet switch

Multiplex communications – Wide area network – Packet switching

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370 61, 370 655, 370 941, 370 942, H04L 1256

Patent

active

054003245

ABSTRACT:
In a packet switch, which is intended for packets of constant length, and which, between switch ports, is divided into a number of nodes (12) and transmission links (14), where the nodes carry out space selection and the transmission links offer point-to-point transmission between the nodes, link grouping is carded out. More particularly, from multiple parallel physical links coming in the switch, link groups are produced, each in the form of a logical link with a bandwidth that is the sum of the bandwidths of the physical links included in the link group, said logical link being restored to outgoing parallel physical links from the switch. One or more link protocols (G1,G2) are used according to which a label in the packet's header is made to describe a route that holds together the grouped links through the entire switch, such that bits in the label describing the route over a certain transmission link are the same for packets belonging to the same link group.

REFERENCES:
patent: 4870641 (1989-09-01), Pattavina
patent: 5016245 (1991-05-01), Lobjinski et al.
patent: 5124978 (1992-06-01), Chao
"Paralleling Links in a Unifed Switching Architecture for Circuit/Packet Switching", IBM Technical Disclosure Bulletin, vol. 32, pp. 45-49 (Feb. 1990).
T. Kozaki et al., "32.times.32 Shared Buffer Type ATM Switch VLSI's for B-ISDN's", IEEE Journal on Selected Areas in Communications, vol. 9, pp. 1239-1247 (Oct. 1991).

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