Method to prevent bit line capacitive coupling

Details Method to prevent bit line capacitive coupling Method to prevent bit line capacitive coupling

2005-05-17

2005-05-17

Lebentritt, Michael S. (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S072000

Reexamination Certificate

active

06894915

ABSTRACT:
Structures, systems and methods for memory cells utilizing trench bit lines formed within a buried layer are provided. A memory cell is formed in a triple well structure that includes a substrate, the buried layer, and an epitaxial layer. The substrate, buried layer, and epitaxial layer include voltage contacts that allow for the wells to be biased to a de voltage level. The memory cell includes a transistor which is formed on the epitaxial layer, the transistor including a source and drain region separated by a channel region. The trench bit line is formed within the buried layer, and is coupled to the drain region of the transistor by a bit contact.

REFERENCES:
patent: 5042011 (1991-08-01), Casper et al.
patent: 5280205 (1994-01-01), Green et al.
patent: 5627785 (1997-05-01), Gilliam et al.
patent: 5702969 (1997-12-01), Lee
patent: 5736761 (1998-04-01), Risch et al.
patent: 5753551 (1998-05-01), Sung
patent: 5792685 (1998-08-01), Hammerl et al.
patent: 5827770 (1998-10-01), Rhodes et al.
patent: 5828602 (1998-10-01), Wong
patent: 5858833 (1999-01-01), Lee et al.
patent: 5914511 (1999-06-01), Noble et al.
patent: 6048767 (2000-04-01), Terada
patent: 6127228 (2000-10-01), Lee
patent: 6218236 (2001-04-01), Economikos et al.
patent: 6243311 (2001-06-01), Keeth
patent: 6261908 (2001-07-01), Hause et al.
patent: 6303424 (2001-10-01), Lee et al.
patent: 6306703 (2001-10-01), Noble
patent: 6312988 (2001-11-01), Lowrey et al.
patent: 6335237 (2002-01-01), Tang et al.
patent: 6344389 (2002-02-01), Bronner et al.
patent: 6344993 (2002-02-01), Harari et al.
patent: 6373138 (2002-04-01), Noble
patent: 6380023 (2002-04-01), Kerr et al.
patent: 6391756 (2002-05-01), Pan et al.
patent: 6455407 (2002-09-01), Pan et al.
patent: 6489226 (2002-12-01), Pan et al.
patent: 6545904 (2003-04-01), Tran
patent: 6600190 (2003-07-01), Lowrey et al.
patent: 6607944 (2003-08-01), Tran et al.

Affiliated with

Also associated with

Rating

Method to prevent bit line capacitive coupling does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method to prevent bit line capacitive coupling, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method to prevent bit line capacitive coupling will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3401317