Method to fabricate multi-level silicon-based...

Details Method to fabricate multi-level silicon-based... Method to fabricate multi-level silicon-based...

2005-08-16

2005-08-16

Wille, Douglas A. (Department: 2814)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S712000

Reexamination Certificate

active

06930051

ABSTRACT:
New methods for fabrication of silicon microstructures have been developed. In these methods, an etching delay layer is deposited and patterned so as to provide differential control on the depth of features being etched into a substrate material. Structures having features with different depth can be formed thereby in a single etching step.

REFERENCES:
patent: 5348619 (1994-09-01), Bohannon et al.
patent: 5554554 (1996-09-01), Bastiani et al.
IBM TDB NB82081402, Aug. 1982, pp 1402-1403.

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