Method to extract gate to source/drain and overlap...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C438S018000

Reexamination Certificate

active

07656183

ABSTRACT:
A method to extract gate to source/drain and overlap capacitances is disclosed. A first capacitance of a first test key having a reference structure and a second capacitance of a second test key having a novel structure are measured. The second test key may comprise at least a gate formed on an insulation structure, at least a contact formed on the insulation structure aside, and a metal layer formed on the contact. Another embodiment of the second test key may comprise at least a gate formed on the semiconductor substrate, a contact formed aside, and a metal layer formed on the contact. Further another embodiment uses a test key comprising at least an elongated gate and an elongated doping region aside, and only one or a few contacts are formed on an end portion of the elongated doping region.

REFERENCES:
patent: 5648920 (1997-07-01), Duvvury et al.
patent: 6069485 (2000-05-01), Long et al.
patent: 6169302 (2001-01-01), Long et al.
patent: 6214709 (2001-04-01), Chen
patent: 6300657 (2001-10-01), Bryant et al.
patent: 2003/0122123 (2003-07-01), Deng et al.

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