Method to ensure isolation between source-drain and gate electro

Details Method to ensure isolation between source-drain and gate electro Method to ensure isolation between source-drain and gate electro

1994-07-05

1995-11-07

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 45, 437192, 437200, H01L 21265, H01L 2144, H01L 2148

Patent

active

054647827

ABSTRACT:
A method for fabricating MOSFET devices with shallow source and drain diffusions, and high yielding self aligned refractory metal silicides was accomplished. This method involves forming a source and drain polysilicon diffusion layer, opening an hole in the polysilicon for the gate region, and fabricating oxide sidewalls in the hole to isolate the source and drain from a polysilicon gate. A polysilicon gate is than formed with a shape that will not allow the sides of this gate to experience subsequent metal deposition. A low temperature silicidation process than results in an absence of source and drain to gate polysilicon shorting or bridging, due to this unique gate polysilicon shape.

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