Method to deposit a stacked high-&kgr; gate dielectric for...

Semiconductor device manufacturing: process – Having magnetic or ferroelectric component

Reexamination Certificate

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C438S240000, C257S295000, C257S310000

Reexamination Certificate

active

06686212

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to integrated circuit fabrication, and specifically to a method of fabricating a MOS gate dielectric for separating a transistor gate from the channel between the source and drain regions.
BACKGROUND OF THE INVENTION
Thermally grown SiO
2
on silicon has been called the “heart and soul” of MOS technology. The Si/SiO
2
interface has excellent semiconductor properties including low interface and bulk trapping, thermal stability, high breakdown, etc. With each successive generation of microelectronic technology, however, the thickness of the gate dielectric is scaled. e.g., becomes smaller. As the thickness is scaled below 1.5 nm, problems arise, such as excessive power consumption due to leakage from direct tunneling, boron penetration, reliability concerns, etc. Because of these problems, in the near future, possibly as early as the 80 nm node in 2005, the reign of SiO
2
as a gate dielectric may dwindle, eventually coming to an end. SiO
2
will likely be replaced by a higher dielectric constant (&kgr;) material, which will have a greater thickness for any given capacitance.
Despite this compelling near term need for an SiO
2
substitute, a suitable replacement still has not been discovered. Requirements for this replacement material include lower leakage, low interface traps, low trapped charge, good reliability, good thermal stability, conformal deposition, etc. Promising candidate materials include metal oxides such as HfO
2
, ZrO
2
, etc., and other metal oxides.
It is crucial to avoid a low-&kgr; interfacial layer when depositing a high-&kgr; film, as even a very thin low-&kgr; layer can negate most of the benefits of the overlying high-&kgr; material. It is therefore essential to deposit a high-&kgr; material directly on H-terminated silicon layer.
Because of the requirements for conformality and thickness control, atomic layer deposition (ALD) has emerged as one of the most promising deposition techniques for high-&kgr; material. In this technique, dielectric material is built up layer-by-layer in a self-limiting fashion, i.e., the deposition phenominnon where only one monolayer of a chemical species will adsorb onto a given surface. Currently, the leading ALD precursors for depositing metal oxides are metal halides and metal organics. There has also been some experimentation using anhydrous metal nitrates as high-&kgr; dielectric precursors.
A film of ZrO
2
, deposited using a metal chloride precursor, such as ZrCl
4
have shown good insulating properties, including a high-&kgr; dielectric constant and low leakage. A major drawback of ZrCl
4
, however, is that it does not provide for smooth deposition directly on H-terminated silicon, requires several “incubation” cycles, and requires a thin layer of SiO
2
for uniform initiation. These problems must be solved before metal-chloride precursors can be used in production.
A drawback of the metal organic precursors is the potential for organic contamination. Hf(NO
3
)
4
has been demonstrated as a viable ALD precursor, as identified in the above-identified related Application, and in Conley, Jr., et al.,
Atomic Layer Deposition of Hafnium Oxide Using Anhydrous Hafnium Nitrate
, Electrochem. and Sol. State Lett. 5 (5) May, 2002. The primary benefit of Hf(NO
3
)
4
is that it allows deposition initiation directly on H-terminated silicon, resulting in a uniform thin layer. This method has the potential to avoid a low-&kgr; interfacial layer, however, experimental work has shown that HfO
2
films deposited via ALD of Hf(NO
3
)
4
have a dielectric constant which is lower than expected, possibly because of the oxygen-rich nature of the films. The “bulk” dielectric properties of the resulting films must be improved before metal-nitrate precursors can find widespread use.
SUMMARY OF THE INVENTION
A method of forming a layer of high-&kgr; dielectric material in an integrated circuit includes preparing a silicon substrate; depositing a first layer of metal oxide using ALD with a metal nitrate precursor; depositing another layer of metal oxide using ALD with a metal chloride precursor; and completing the integrated circuit.
It is an object of the invention to deposit a metal oxide high-&kgr; layer on a silicon substrate.
Another object of the invention is to deposit a metal oxide high-&kgr; layer on a silicon substrate without the requirement of forming a low-&kgr; interfacial layer on the silicon substrate.
A further object of the invention is to provide a high-&kgr; layer having low leakage properties.
This summary and objectives of the invention are provided to enable quick comprehension of the nature of the invention. A more thorough understanding of the invention may be obtained by reference to the following detailed description of the preferred embodiment of the invention in connection with the drawings.


REFERENCES:
patent: 6013553 (2000-01-01), Wallace et al.
patent: 6203613 (2001-03-01), Gates et al.
patent: 6297539 (2001-10-01), Ma et al.
patent: 2002/0130340 (2002-09-01), Ma et al.
patent: 2002/0153579 (2002-10-01), Yamamoto
patent: 2002/0173130 (2002-11-01), Pomerede et al.
patent: 2002/0197789 (2002-12-01), Buchanan et al.
patent: 2003/0049942 (2003-03-01), Haukka et al.
John F. Conley, Jr., et al.,Atomic Layer Deposition of Hafnium Oxide Using Anhydrous Hafnium Nitrate, Electrochem. and Sol. State Lett. 5 (5) May, 2002.
H. Zhang et al.,High permittivity thin film nanolaminates, J. Appl. Phys. 87, 1921 (2000).

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