Method to configure phase-locked loop dividing ratio

Oscillators – With frequency calibration or testing

Reexamination Certificate

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Details

C331S014000, C331S016000, C331S025000

Reexamination Certificate

active

11091262

ABSTRACT:
A system and method for configuring a phased-lock loop (PLL) dividing ratio which does not require the phased-lock loop circuit to lock. In one embodiment, the method includes inducing a substantially minimum or a substantially maximum frequency output from a voltage-controlled oscillator (VCO), and configuring a divider with a corresponding dividing ratio. The method may include grounding an input voltage to the VCO. Alternately, the method may include manipulating inputs to a charge pump providing input to the VCO. The charge pump inputs may be manipulated directly or through a phase-frequency detector providing input to the charge pump and adapted to receive additional input signals.

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patent: 6512419 (2003-01-01), Adams et al.
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patent: 06-244718 (1994-09-01), None
patent: 10-041812 (1998-02-01), None
patent: 2000-124800 (2000-04-01), None
patent: 2002-198811 (2002-07-01), None
patent: 2003-069423 (2003-03-01), None

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