Method to battery back up SDRAM data on power failure

Details Method to battery back up SDRAM data on power failure Method to battery back up SDRAM data on power failure

1998-08-18

2001-11-13

Sheikh, Ayaz (Department: 2155)

Data processing: generic control systems or specific application

Specific application, apparatus or process

Electrical power generation or distribution system

C700S292000, C700S293000, C700S295000, C700S296000, C700S297000, C700S298000, C711S106000, C713S300000, C713S340000, C365S222000, C365S223000, C365S226000, C365S229000

Reexamination Certificate

active

06317657

ABSTRACT:

The present invention relates generally to power failure protection for synchronous dynamic RAMs (SDRAMS) and, particularly, to battery backup systems and methods for SDRAMS.
BACKGROUND OF THE INVENTION
Synchronous Dynamic RAMs (SDRAMs) have become a popular type of dynamic memory due to their speed of operation and ease of use. SDRAMs are used in motherboards, embedded products such as RAID controllers, routers, Ethernet controllers and other systems that employ memory. Some of these products, such as RAID controllers, cannot afford to lose memory data upon power failure. In these products memory is backed-up by battery during power failures so the stored data can be continually refreshed, allowing the stored data to be available when power is restored.
In one type of battery backup system only the memory is backed-up during power failures. As a result, the required battery is small and can be positioned near the memory in products with space constraints.
There are three possible prior art methods by which SDRAM can be backed up by battery. In the first method a power-down event is detected early (i.e., before the SDRAM has lost its stored data) and system software configures auto-refresh circuitry to set the SDRAM in an auto-refresh mode in which auto-refresh cycles are given periodically as long as system power is off and power to the memory is provided by battery.
In the second method a power-down event is detected early and system hardware configures auto-refresh circuitry to set the SDRAM in an auto-refresh mode in which auto-refresh cycles are given periodically as long as system power is off and power to the memory is provided by battery.
In the third method a power-down event is detected early and system software configures SDRAM self-refresh circuitry to set the SDRAM in a self-refresh mode in which a self refresh command is given anytime system power falls below a threshold level. The self-refresh command is supported by most SDRAMs with proprietary circuitry.
A disadvantage of the first and second methods is that the battery has to drive the control signals to the SDRAM for auto-refreshing, which discharges the battery faster and hence reduces battery life.
The third method, which uses the SDRAM self refresh mode, requires the system software to issue only a single self-refresh command to the SDRAM before the power goes down. As a result, no SDRAM control signals need to be driven by the battery during the power outage, which preserves battery life. A disadvantage of this method is that the software has to stop all activities and place the SDRAM in self-refresh mode before the power falls below the threshold voltage. However, the software may be executing uninterruptable tasks, in which case it might be difficult for the software to place the SDRAM in self-refresh mode in the available time.
SUMMARY OF THE INVENTION
The present invention is a system and method for providing battery back-up of SDRAM data upon power failure. More particularly, the present invention is a battery back-up system and method in which a power-down event is detected early and system hardware configures SDRAM self-refresh circuitry to set the SDRAM to a self refresh mode in which the SDRAM issues a self-refresh command just before system power drops below a safe threshold level and keeps the SDRAM in self-refresh mode when the SDRAM is powered by battery power.
One system embodiment for use with an external SDRAM controller includes a self-refresh control module (SRCM) and a battery backup module (BBUM). The BBUM includes power-down detection hardware and a battery for backing-up the SDRAM. In response to signals from the external SDRAM controller and the BBUM the self-refresh module generates SDRAM control signals for transitioning the SDRAM smoothly from normal mode to self-refresh mode during power-down events and vice-versa. The signals from the BBUM include an early power-down signal PDN that is asserted whenever power is about to go down. The signals from the external SDRAM controller include an auto-refresh signal that is asserted whenever the SDRAM controller initiates an auto-refresh operation.
The self-refresh module, after receiving the asserted PDN signal, initiates a self-refresh operation after receiving the next assertion of the auto-refresh signal. This is a safe time to perform a self-refresh operation as the external SDRAM controller asserts the auto-refresh signal when there is sufficient time for the self-refresh module to switch to self-refresh mode and when no data operations would be interrupted. The self-refresh module initiates the self-refresh operation via SDRAM control signals, such as a clock enable, chip selects, a row address strobe (RAS), a column address strobe (CAS) and a write enable.
In one embodiment the auto-refresh signal is a chip select signal that is not used by the SDRAM and is activated only for the auto-refresh command (i.e., it is not used for any data accesses). As a result of employing the unused chip select line to carry the auto-refresh signal the load impedances of the actual control signals used by the SDRAM are not disturbed. This enables the SDRAM to achieve the speed for which the External Memory Controller (EMC) is designed. Another benefit of employing the single, unused, EMC chip select as the auto-refresh signal is that the auto-refresh state can be detected from a single control line rather than from a combination of several control lines, which simplifies the self-refresh module circuitry.


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