Method, system, and computer program product for extending spars

Data processing: software development – installation – and managem – Software program development tool – Translation of code

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G06F 945

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active

061517062

ABSTRACT:
A method, system, and computer program product for performing speculative code motion within a sparse partial redundancy elimination (PRE) framework. Speculative code motion (i.e., speculation) refers to the placement of computations by a compiler in positions in the program that results in some paths being executed more efficiently and some being executed less efficiently. A net speed-up is thus achieved when the improved paths are those executed more frequently during the program's execution. Two embodiments for performing speculative code motion within the PRE framework are presented: (1) a conservative speculation method used in the absence of profile data; and (2) a profile-driven speculation method used when profile data are available. In a preferred embodiment, the two methods may be performed within static single assignment PRE (SSAPRE) resulting in better optimized code.

REFERENCES:
patent: 5327561 (1994-07-01), Choi et al.
patent: 5659754 (1997-08-01), Grove et al.
patent: 5692169 (1997-11-01), Kathail et al.
patent: 5768596 (1998-06-01), Chow et al.
patent: 5778219 (1998-07-01), Amerson et al.
Rosen et al. Global Value Numbers and Redundant Computations. ACM. pp. 12-27, Jan. 1988.
Gupta. Code Optimization as a Side Effect of Instruction Scheduling. High Performance Computing, 1997. Proceedings. Fourth International Conference. pp. 370-377, Dec. 1997.
Choi et al. Scheduling of Conditional Branches Using SSA From for Superscalar/VLIW Processors. IEEE. pp. 344-351, Jun. 1996.
Park et al. Evolution of Scheduling Techniques on a SPARC-Based VLIW Testbed. IEEE. pp. 104-113, Jan. 1997.
Gupta et al. Path Profile Guided Partial Redundancy Elimination Using Speculation. IEEE. pp. 230-239, Feb. 1998.
Chow et al., "A New Algorithm for Partial Redundancy Elimination based on SSA Form", Proceedings of the ACM SIGPLAN '97 Conference on Programming Language Design and Implemention, pp. 273-286, Jun. 1997.
Gupta et al, "Path Profile Guided Dead Code Elimination Using Prediction", Proceedings of the Fifth International Conference on Parallel Architectures and Compilation Techniques, pp. 102-113, Nov. 1997.
Gupta et al., "Resource-Sensitive Profile-Directed Data Flow Analysis for Code Optimization", Proceedings of the 30.sup.th Annual International Symposium on Microarchitecture, pp. 358-368, Dec. 1997.

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