Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-11-14
2006-11-14
Elms, Richard (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185240, C365S185330
Reexamination Certificate
active
07136304
ABSTRACT:
The present invention is a multi-phase method, circuit and system for programming non-volatile memory (“NVM”) cells in an NVM array. The present invention may include a controller to determine when, during a first programming phase, one or more NVM cells of a first set of cells reaches or exceeds to first intermediate voltage, and to cause a charge pump circuit to apply to a terminal of the one or more cells in the first set second phase programming pulses to induce relatively greater threshold voltage changes in cells having less stored charge than in cells having relatively more stored charge.
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Cohen Guy
Eitan Boaz
Eitan Law Group
Nguyen Dang
Saifun Semiconductor Ltd
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