Coded data generation or conversion – Digital code to digital code converters – To or from particular bit symbol
Reexamination Certificate
2002-02-12
2004-08-31
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from particular bit symbol
C340S572100, C235S435000
Reexamination Certificate
active
06784813
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to radio frequency identification (RFID) tags.
2. Description of the Related Art
Many product-related and service-related industries entail the use and/or sale of large numbers of useful items. In such industries, it may be advantageous to have the ability to monitor the items that are located within a particular range. For example, within a particular store, it may be desirable to determine the presence of inventory items located on the shelf, and that are otherwise located in the store.
A device known as an RFID “tag” may be affixed to each item that is to be monitored. The presence of a tag, and therefore the presence of the item to which the tag is affixed, may be checked and monitored by devices known as “readers.” A reader may monitor the existence and location of the items having tags affixed thereto through one or more wired or wireless interrogations. Typically, each tag has a unique identification number that the reader uses to identify the particular tag and item.
Currently available tags and readers have many disadvantages. For instance, currently available tags are relatively expensive. Because large numbers of items may need to be monitored, many tags may be required to track the items. Hence, the cost of each individual tag needs to be minimized. Furthermore, currently available tags consume large amounts of power. Currently available tag power schemes, which include individually tag-included batteries, are inefficient and expensive. These inefficient power schemes also lead to reduced ranges over which readers may communicate with tags in a wireless fashion. Still further, currently available readers and tags use inefficient interrogation protocols. These inefficient protocols slow the rate at which a large number of tags may be interrogated.
Hence, what is needed is a tag that is inexpensive, small, and has reduced power requirements. Furthermore, what is needed are more efficient tag interrogation techniques, that operate across longer ranges, so that greater numbers of tags may be interrogated at faster rates.
SUMMARY OF THE INVENTION
The present invention is directed to an RFID architecture where a reader or network of readers may interrogate and/or power tags at data rates, distances, and reliability levels that are greater than those currently attainable in the RFID industry for similarly classified tags. The present invention is also directed to RFID tags that may be produced at costs lower than those of similarly classified tags that are currently available. These features are the result of a unified design approach, where the attainment of higher data rates and increased communication distances are correlated with the realization of a lower tag cost.
In particular, the tag of the present invention has the advantages of lower cost and reduced power consumption. The reduction of power consumption in turn increases the possible communication range between a reader and a tag. The connection between the reduction of cost and power consumption is based at least in part on the principle that the power consumption of an electronic device is directly proportional to (1) the number of transistors in the device, and (2) the frequency at which circuits of the device operate. The tags of the present invention operate according to efficient algorithms, such as binary traversal communications protocols, that require reduced logic processing. The reduction in logic processing promotes the use of fewer transistors. Furthermore, the use of fewer transistors promotes reduced power consumption and reduced circuit sizes. Reduced circuit sizes lower the cost of producing the one or more chips that host the circuits, which may be application specific integrated circuits (ASIC), for example.
The present invention utilizes the reduction in power consumption to increase the range at which a reader and a tag may communicate. Tags of the present invention may incorporate charge pump circuitry and an energy storage capacitor to convert RF energy received from readers into an operational voltage and current. This conversion occurs at a greater distance from the reader than currently existing tags allow. By reducing the tag's power consumption requirements, the present invention enables a tag to communicate with a reader across greater distances, where the magnitude of RF energy received from the reader is insufficient to power conventionally designed tags.
The high data rates provided by the present invention are the result of simplified algorithms. Conventional algorithms interrogate RFID tags with highly complex algorithms that are less efficient. Furthermore, the use of conventional algorithms often involves two or more RF transmissions colliding. When collisions occur, further RF transmissions are required to resolve the collisions. Collision resolution consumes time without conveying data, and mandates complexity in algorithms, circuit design, and transistor count. In contrast, the present invention employs simple, efficient algorithms, such as binary traversal protocols, that enable a population of tags to be interrogated in a collision free environment.
This collision free environment is based on a set of communications symbols that allows multiple symbol values to be transmitted simultaneously without interference between, or destruction of any of these symbols.
These simplified algorithms do not require complex circuitry and intense processing. Therefore, in addition to promoting increased data rates, these efficient algorithms also promote lower transistor counts, lower tag costs, and lower power consumption (which increases the range at which a reader and tag may communicate).
A method, system, and apparatus for defining data signal symbols in a RFID tag device are described herein. A first calibration pulse is received on an input signal. A length of the received first calibration pulse is stored as a stored first length. A second calibration pulse is received on the input signal. A length of the received second calibration pulse is stored as a stored second length.
Data symbols are detected according to the present invention. A data symbol having a pulse portion is received on the input signal. The pulse portion has a length. The data symbol is determined to be a first data value if the length of the pulse portion is less than the stored first length. The data symbol is determined to be a second data value if the length of the pulse portion is greater than the stored first length and less than the stored second length. The data symbol is determined to be a third data value if the length of the pulse portion is greater than the stored second length.
In a further aspect of the present invention, data symbols in the RFID tag device may be further defined. A third calibration pulse is received on the input signal. A length of the received third calibration pulse is stored as a stored third length.
Data symbols are detected according to this further aspect of the present invention. A data symbol is received having a pulse portion on the input signal. The pulse portion has a length. The data symbol is determined to be a first data value if the length of the pulse portion is less than the stored first length. The data symbol is determined to be a second data value if the length of the pulse portion is greater than the stored first length and less than the stored second length. The data symbol is determined to be a third data value if the length of the pulse portion is greater than the stored second length and less than the stored third length.
The first, second, and third data values may be defined to represent any variety of data values. In one example aspect of the present invention, the first data value is defined as a 0 bit, the second data value is defined as a 1 bit, and the third data value is defined as a Null bit.
REFERENCES:
patent: 3520406 (1970-07-01), Turner
patent: 3689885 (1972-09-01), Kaplan et al.
patent: 4071908 (1978-01-01), Brophy et al.
patent: 4225953 (1
Arneson Michael R.
Bandy William R.
Powell Kevin J.
Shanks Wayne E.
Matrics, Inc.
Sterne Kessler Goldstein & Fox P.L.L.C.
Wamsley Patrick
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