Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – On insulating substrate or layer
Patent
1996-05-03
1998-12-22
Graybill, David
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
On insulating substrate or layer
438459, 438690, 438691, 438692, 438693, 438759, 438940, 438975, 438977, H01L 21283, H01L 21304
Patent
active
058518940
ABSTRACT:
A method of fabricating vertically integrated microelectronic systems by CMOS-compatible standard semiconductor process technology, by independently processing individual component layers of at least two separate substrates, including the formation of via holes penetrating through all existing component layers and connecting together the front surfaces of the two substrates, thinning the reverse surface of one of the substrates down to the via holes, increasing the depth of the via holes to a metallization plane of the other substrate and forming electrically conductive connections between the two substrates through the via holes.
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Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung
Graybill David
Hormann Karl
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