Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material
Reexamination Certificate
2002-07-03
2003-11-18
Nhu, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
C438S475000
Reexamination Certificate
active
06649499
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductors.
BACKGROUND OF THE INVENTION
A read only memory (“ROM”) is a device having a plurality of memory cells that permanently store bits of data. A resistive ROM typically includes a planar array of parallel word lines, which is perpendicular to and insulated from a planar array of parallel bit lines. A designated number of the memory cells in the ROM have a resistive element connecting a node of one word line with a node of one bit line. The presence or absence of a resistive element in each memory cell determines whether a binary “0” or “1,” for example, is stored therein. The values stored within the ROM are “read” (i.e., output) by measuring a sense current flowing through each bit line from the memory cells of successive word lines.
Various ROM structures are known in the art. One known structure, referred to as a mask-written ROM, employs a semiconductor lithographic mask to “write” (i.e., program) the values of the data bits into the memory cells of the ROM. The mask comprises a pattern for designating each memory cell in which the resistive element is to be fabricated.
With the desired storage capacity (i.e., the number of stored bits per device) of ROMs ever increasing, it follows that the number of cells needed has also been increasing. However, as the number of memory cells increase, the problem of crosstalk has grown. Crosstalk may be characterized as the misinterpretation of a bit attributed to the influence of other bits stored in the ROM. Crosstalk results from the influence of the inevitable wire resistance in each bit line. As the number of cells increase, the wire resistance of each bit line increases relative to the resistance of each memory cell. Consequently, an increase in the wire resistance of each bit line increases the likelihood that a substantial portion of the sense current on one word line will be redirected onto an adjacent word line. This may cause the false reading of the binary values stored within each cell of the ROM.
One known approach for minimizing crosstalk has been to incorporate a supplemental resistance—e.g., a field effect transistor—in each memory cell of the ROM. The effective resistance of each cell may therefore be sufficiently increased relative to the wire resistance to reduce the likelihood that substantial amounts of sense current on one word line will be redirected onto an adjacent word line.
As industry drives towards increasing the density (i.e., the number of bits per unit area) of ROMs, however, the use of a field effect transistor as a supplemental resistance has become a problem. Field effect transistors require considerable unit area relative to each ROM cell. Consequently, an alternate ROM structure is needed having a sufficiently high relative memory cell resistance to minimize crosstalk and increase ROM density.
In accordance with my co-pending, commonly assigned, U.S. patent application, entitled “READ ONLY MEMORY STRUCTURE,” Ser. No. 09/888,878, filed concurrently with the present application, I have invented a ROM structure that engenders maximum density. As detailed in my co-pending application, a resistance-altering constituent is disposed within at least one designated memory cell of a plurality of memory cells such that a first numerical value may be interpreted as being stored in each designated cell and at least a second numerical value may be interpreted as stored in each remaining (non-designated) cell of the plurality. In one example disclosed in my co-pending patent application, each memory cell of the plurality is formed from a conductive layer, such as polycrystalline silicon, while a Group IA element, such as hydrogen, is disposed within the conductive layer of each designated memory cell.
As detailed in my co-pending patent application, each designated memory cell has a first resistance, while each remaining memory cell has at least a second resistance. Advantageously, I have recognized that disposing the resistance-altering constituent within each designated memory cell sufficiently increases the information storage capability over presently available ROM structures.
I have also identified a number of issues in making the ROM structure detailed in my aforementioned co-pending patent application. More particularly, I have recognized that employing a lithographic mask to write the binary values into the memory cells of a ROM, for example, is cost prohibitive. Each new data set to be stored in a ROM requires the production of a new lithographic mask. Furthermore, the use of a lithographic mask to dispose the resistance-altering constituent necessitates the completion of each ROM exclusively at the manufacturer's site.
SUMMARY OF THE INVENTION
I have invented a method for varying the resistance along a conductive layer. More particularly, I have invented a method for making a ROM structure, without the need for a lithographic mask. In my invention, a resistance-altering constituent is diffused into a conductive layer, and thereafter, at least a portion of the in-diffused resistance-altering constituent is moved according to a pattern. The pattern of moving the resistance-altering constituent may relate, advantageously, to the binary values of the data bits to be stored in a ROM. In one example of the invention, each memory cell of a ROM is formed from a conductive layer, such as polycrystalline silicon, while the resistance-altering constituent comprises at least one Group IA element, such as hydrogen.
I have recognized that by eliminating the need for a lithographic mask to write the binary values into the memory cells of a ROM, for example, the cost of manufacture will be reduced. Moreover, by moving at least a portion of the resistance-altering constituent from the conductive layer, my method enables a ROM to be written remotely (e.g., in the field), in contradistinction with the prior art, which requires the ROM be written at the manufacturer's site.
REFERENCES:
patent: 5847442 (1998-12-01), Mills et al.
patent: 6107666 (2000-08-01), Chang
patent: 6458676 (2002-10-01), Mills et al.
patent: 6542397 (2003-04-01), Mills et al.
Lucent Technologies - Inc.
Nhu David
Teitelbaum Ozer M. N.
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