Method of utilizing IDDQ tests to screen out defective parts

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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Details

3241581, 324763, 714740, G01R 3126, G01R 3102, G01R 104, G06F 1100

Patent

active

061408328

ABSTRACT:
A method that uses effective widths of NMOS and PMOS devices in a digital circuit and their intrinsic junction and subthreshold leakage currents to produce a specification for IDDQ, the range of IDDQ, and the delta of IDDQ between pre- and post-overvoltage stress tests to screen out defective integrated circuits having excessive extrinsic current leakage. The present invention provides for a computer-implemented method that generates an indication of whether IDDQ values associated with integrated circuits that have been tested are within the IDDQ specification or not. This processing eliminates the need for time-intensive and costly burn-in testing on the integrated circuits.

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