Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-10-02
2004-09-28
Chaudhuri, Olik (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
73
Reexamination Certificate
active
06797640
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to integrated circuit structures and fabrication methods;
and in particular to integrated circuit fabrication methods utilizing a copper plasma etch process.
2. Description of the Prior Art
Low temperature (<80C) plasma etch processes for copper (Cu) metal etch applications have been demonstrated and are in development for semiconductor manufacturing applications. The use of conventional photolithographic processing with organic photo resists for such etch processes produces the typical etch byproducts: organic polymers which incorporate the components of the films being etched. The removal of these polymers is especially problematic in the case of copper metal etch due to the reactivity of this material and the associated corrosion effects of aggressive cleaning technologies and solvents.
Plasma etch processes for copper metal layers have been demonstrated using a conventional photolithographic resist mask at temperatures as low as 60° C. (see, e.g., K. S. Choi, C. H. Han, J. Electrochem Soc., V. 145, No. 3, Mar. 1998, which is hereby incorporated by reference).
One problem encountered in using conventional plasma etch on resist pattern processing is the post etch clean. Conventional resists are polymerized during the etch process, producing by-products with incorporate components of the films being etched. These tainted polymers are often difficult to remove, requiring products which incorporate aggressive solvents and plasma etch processes which are incompatible with the copper.
SUMMARY OF THE INVENTION
For copper plasma etch applications, a hard mask, e.g., a silicon dioxide or silicon nitride film, is used to avoid organic polymer materials. The hard mask would be deposited as a blanket layer on the Cu metal layer and itself be patterned and etched with a conventional photolithographic resist pattern. The hard mask etch could either be stopped shortly before the Cu surface is exposed or, less preferably, when the Cu surface is exposed. Halting the hard mask etch before the Cu surface is exposed facilitates the use of conventional cleaning processes following the hard mask etch. The remaining thin layer of hard mask can be etched through during the beginning of the Cu metal etch process. Any remaining hard mask on the Cu metal layer can form a part of a new dielectric layer.
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Nunan Peter D.
Tesauro Mark Richard
Chaudhuri Olik
Jorgenson Lisa K.
Kebede Brook
Munck William A.
STMicroelectronics Inc.
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