Stock material or miscellaneous articles – Composite – Of epoxy ether
Reexamination Certificate
2000-07-03
2002-09-10
Dawson, Robert (Department: 1712)
Stock material or miscellaneous articles
Composite
Of epoxy ether
C428S413000, C430S315000
Reexamination Certificate
active
06447914
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to electronic packages such as chip carriers, printed circuit boards, printed circuit cards, accessory cards, and the like, and more particularly to such electronic packages of the organic type where a conductive layer, as a copper conductive layer, is deposited atop a seed layer.
BACKGROUND OF THE INVENTION
In one known process for fabricating circuitized structures, such as printed circuit boards, electroless additive plating is employed to plate metal, such as copper, to form circuitization onto the structure's dielectric surfaces. In forming such circuitization for these structures, the structure's surface may be photoimaged dielectric, having through holes photoimaged in the dielectric, and may be blanket-coated with seed. Next, a photoresist may be blanket-coated onto the seed layer and photoimaged in a pattern corresponding to the designed circuitization pattern. The line channels may then be developed away, and the structure immersed in an electroless plating bath so that copper may be additively plated in the channels atop the exposed seed; copper may simultaneously be plated into the through holes. The photoresist may then be stripped, leaving circuitization atop the dielectric. The seed which does not have copper deposited thereon, may then be removed. If desired, the copper may then be further plated.
Conventional seeding and electroless plating circuitization methods often suffer from excessive seed deposition; the presence of excessive seed on a circuit board leads to leakage shorts and poor adhesion of the photoresist onto the seed due to a non-homogeneous surface. Excess seed can also lead to unwanted metal plating in subsequent steps.
Conventional seeding and electroless plating method can also suffer from non-uniform electroless plating within the circuitization line channels, resulting in unwanted skip plating or defects.
It is, therefore, desirable to provide a method for depositing seed which does not result in excessive seed deposition or non-uniform electroless plating within the circuitization line channels. Circuit boards produced with this method should have lower levels of plating circuit line defects and shorts. This would also reduce the need for excessive inspection and improve outgoing product quality levels.
OBJECTS AND SUMMARY OF THE INVENTION
Accordingly, it is an object of this invention to enhance the art of seeding and electroless plating technology.
It is another object of this invention to provide a novel method for both reducing and more uniformly distributing the amount of seed deposited on a dielectric substrate, thereby depositing electroless plating in a very uniform fashion.
It is yet another object of this invention to provide a circuitized substrate for use in manufacture of a multilayer printed circuit board, the circuitized substrate having a reduced level of leakage shorts and skip plating defects (i.e. voids or pits).
This invention is adaptable to mass production, improves overall product quality and reduces the cost of manufacturing such products.
According to one aspect of this invention there is provided a method of making a circuitized substrate, the method comprising the steps of providing a substrate having a dielectric layer, the dielectric layer having a first external surface, treating the first external surface of the dielectric layer with alkali to promote subsequent uniform deposition of a polyelectrolyte thereon, heating the substrate so as to oxidize the first external surface of the dielectric layer, depositing a polyelectrolyte layer onto the alkali treated and heated dielectric layer on the external surface of the dielectric layer, depositing a seed layer on the polyelectrolyte layer, and providing a layer of circuitry on the seed layer.
According to another aspect of this invention, there is provided a circuitized substrate comprising a substrate having a dielectric layer and a first external surface, with at least a portion of the first external surface being oxidized, a polyelectrolyte layer on the oxidized portion of the first external surface of the dielectric layer, a seed layer on the polyelectrolyte layer, and a circuitized conductive layer on the seed layer.
REFERENCES:
patent: 4969979 (1990-11-01), Appelt et al.
patent: 5015339 (1991-05-01), Pendleton
patent: 5866237 (1999-02-01), Angelopoulos et al.
Angelopoulos Anastasios P.
Jones Gerald W.
Matienzo Luis J.
Miller Thomas R.
Taylor William D.
Connolly Bove Lodge & Hutz
Dawson Robert
Feely Michael
Fraley Lawrence R.
International Business Machines - Corporation
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