Method of transmitting clock signal and device employing the sam

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Regenerating or restoring rectangular or pulse waveform

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Details

327165, 327291, 327299, H03K 515

Patent

active

057810494

ABSTRACT:
A frequency divider 1 on the transmitting side divides the frequency of a clock signal of period T by 8, generates a pulse signal P2 of pulse width 4T and duty ratio 50%, and outputs the result to a shift register 2. The shift register 2 generates pulse signals P3-1, P3-2, P3-3, and P3-4 by giving delays 0, T, 2T, and 3T to the pulse signal P2, and sends them to transmission lines 101, 102, 103, and 104, respectively. Edge detectors 3-1, 3-2, 3-3, and 3-4 on the receiving side detect respectively the leading edges and the trailing edges of the pulse signals P3-1, P3-2, P3-3, and P3-4, and output edge detection signals P4-1, P4-2, P4-3, and P4-4. An OR gate 4 combines these edge detection signals. A clock regenerator 5 generates a regenerated signal P6 having the frequency equal to that of the clock signal P1 based on the combined edge detection signal P5.

REFERENCES:
patent: 4665535 (1987-05-01), Nagasawa
patent: 5282223 (1994-01-01), Muramatsu

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