Pulse or digital communications – Multilevel
Patent
1997-01-13
1998-08-11
Chin, Stephen
Pulse or digital communications
Multilevel
375259, 326 59, H04L 2534, H04L 2549
Patent
active
057938164
ABSTRACT:
Data transmission arrangement for transmitting data between integrated circuit chips in a computer comprises a driver circuit having inputs connected to two discrete data bits. The driver circuit converts the states of the two data bits to one of four possible output voltage levels on each of two data transmission conductors. A receiver circuit connected to the data transmission conductors converge the multi-level signals on the pair of transmission conductors into binary output signals for use in a receiving circuit chip. The driver circuit and receiver circuit are balanced circuits and symmetrically arranged such that essentially the same magnitude of current is drawn from the power bus independent of the value of the signal being transmitted, thereby eliminating Delta-I noise typically occurring on a power bus when binary data is transmitted.
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Riishoj et al. A 4 GB/s Two-Level to GSYMBOL/s 4-Level Converter GaAs IC for Semiconductor Optical Amplifier QPSK Modulators, IEEE Journal of Solid-State Circuits, vol. 29, No. 10, Oct. 1993.
Augspurger Lynn L.
Chin Stephen
International Business Machines - Corporation
Webster Bryan
LandOfFree
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