Method of testing the output propagation delay of digital device

Details Method of testing the output propagation delay of digital device Method of testing the output propagation delay of digital device

1993-11-01

1996-01-30

Wieder, Kenneth A.

Electricity: measuring and testing

Impedance, admittance or other quantities representative of...

Parameter related to the reproduction or fidelity of a...

371 251, 371 62, G01R 1512

Patent

active

054883091

ABSTRACT:
A test system for testing propagation delays of outputs of integrated circuit devices. The test system includes a test circuit for applying input signals to selected inputs of the digital integrated circuit and for sampling selected outputs of the digital integrated circuit, and respective loads for each of the selected outputs, each load having an impedance that is configured such that the sum of the specified internal delay for such output and a load dependent delay for such output comprise a total propagation delay that is substantially identical for all of the selected outputs, whereby all of the selected outputs are sampled simultaneously.

REFERENCES:
patent: 4146835 (1979-05-01), Chnapko et al.
patent: 4330750 (1982-05-01), Mayor
patent: 4497056 (1985-01-01), Sugamori
patent: 4712061 (1987-12-01), Lach
patent: 4845390 (1989-07-01), Chan
patent: 4876501 (1989-10-01), Ardini et al.

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