Method of testing for short circuits between adjacent...

Details Method of testing for short circuits between adjacent... Method of testing for short circuits between adjacent...

2005-09-06

2005-09-06

Tang, Minh N. (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S073100

Reexamination Certificate

active

06940299

ABSTRACT:
In a method of testing an IC, short circuits between adjacent I/Os are tested by grounding alternate rows in one step, and alternate columns in another step, and, if necessary including a third step of testing any inadequately tested I/Os by identifying inadequately tested I/Os and then testing these. The identifying may include performing an AND operation on the two I/O configurations of the two first steps, the grounded I/Os being defined as logic 0 and the tested I/Os as logic 1. The third step involves grounding all power supply and all ground pins of the IC and testing the remaining I/Os that were inadequately tested in both of the first two steps.

REFERENCES:
patent: 5513188 (1996-04-01), Parker et al.
patent: 5956280 (1999-09-01), Lawrence

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