Method of testing electronic wafers having lead-free solder...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Reexamination Certificate

active

07005880

ABSTRACT:
A cantilever probe method of parametrically testing wafers extends the probe tip cleaning interval, maintains relatively low contact resistance, and reduces contact resistance variability. In one embodiment of our invention, a method of testing electronic circuits formed in a wafer having lead-free terminals, comprises the steps of exposing the terminals to a plasma containing oxygen; providing a test apparatus having cantilevered probes for contacting the terminals; each probe having a cantilevered probe arm and a BeCu probe tip extending from the arm at an acute angle α; the angle α being designed to essentially eliminate sliding movement of the probe tip when in contact with a terminal; and bringing the probe tips into contact with selected ones of the terminals, so as to perform electrical tests on the wafer; and, during the contacting step, exposing the probe tips to a flow of a non-oxidizing gas (e.g, nitrogen, argon). In a preferred embodiment, the terminals are Sn-based solder bumps. In another preferred embodiment the angle α is approximately 87°–90°.

REFERENCES:
patent: 6452400 (2002-09-01), Kawai et al.
O. Weeden, “Probe Card Tutorial,” pp. 1,3,16,29-31,40 (2003), found at the website ofKeithley Instruments , Inc.at URL: http://keithley.com/servlet/Data?id=13263.
P. W. Seitzer, “Alternatives to Vertical Probing,”pp. 1, 6 (2000), found at the website of theSouthwest Test Workshopat the website URL: http://www.swtest.org/swtw—library/2000proc/PDF/Intro—2000.pdf.

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