Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
1999-08-18
2004-04-27
Barlow, John (Department: 2863)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C702S118000, C702S120000, C714S724000, C714S720000, C714S729000
Reexamination Certificate
active
06728652
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a testing apparatus for a variety of electronic components, such as semiconductor integrated circuit devices (hereinafter simply referred to as an “IC” or “ICs”) and a method of testing electronic components, and especially relates to a method of testing electronic components which can increase the number of electronic components to be simultaneously tested even if the number of terminals on a test head side is small and a testing apparatus for electronic components.
2. Description of the Related Art
A testing apparatus for electronic components, called a “handler”, conveys a large number of ICs held on a tray to the inside of a testing apparatus where the ICs are pressed against socket terminals connected to a test head, then the IC testing unit (tester) is made to perform the test. When the test is ended, the ICs are conveyed out from the test procedure and reloaded on trays in accordance with the results of the tests so as to classify them into categories of good ICs and defective ones.
In a handler of the related art, there are some types wherein trays for holding the ICs to be tested or the tested DUTs (hereinafter referred to the “customer trays”) and trays conveyed circulating inside the handler (hereinafter referred to as the “test trays”) are different, therefore, in such types of handlers, the ICs are switched between the customer trays and the test trays before and after the test, and in the testing processing wherein tests are carried out by contacting the ICs to the socket terminals, ICs are pressed against the test head while being carried on the test trays.
In such handlers, it is considered that the faster the processing speed is and the larger the number of ICs to be tested is in a certain period of time (meaning “throughput” of the testing apparatus), the more preferable, however, as shown in
FIG. 14
, the throughput is substantially proportional to the number of ICs simultaneously pressed against the socket of the test head, that is the simultaneously tested number when in a specification requiring a longer testing time (often the case with, for example, memory ICs). For example, as shown in the same figure, in a range where the time for testing is longer, throughput of handlers of simultaneously testing 64 ICs becomes twice as much as that of the handlers of simultaneously testing 32 ICs. Accordingly, when the simultaneously tested numbers of ICs is increased, the through-put can be higher.
In order to increase the simultaneously tested numbers of ICs, however, the number of the terminals on the test head side has to be increased along with it. Thus, a test head of the related art could not be used as it was.
FIG. 13
is a schematic view of the connection relationship of the test head terminals and the socket terminals in a test procedure. In handlers of the related art, terminals on the test head side were separately provided for each of driver pins and input/output pins of the ICs (DUTs: Device Under Test). Therefore, the number of ICs capable of being simultaneously tested on the handler side is restricted by the number of the terminals on the test head side. In other words, the number of terminals on the test head side has decided the limit of the number of ICs of handlers simultaneously tested.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of testing electronic components which can increase the number of ICs to be simultaneously tested even if the number of terminals on the test head side is small and a testing apparatus for electronic components.
(1-1) According to a first aspect of the present invention, there is provided a method of testing electronic components to judge whether the electronic component is good or defective in accordance with a response output signal by inputting a test signal to the electronic component to be tested including: a first test step of inputting a common test signal to the respective electronic components of a group of electronic components composed of a plurality of electronic components and judging in accordance with a response signal thereof whether the group of electronic component subjected to the test is good or defective as a whole; a second test step of inputting mutually independent test signals to the respective electronic components of a group of electronic components judged to be defective in the first test step and judging in accordance with a response signal thereof each of the electronic components subjected to the test is good or defective.
In the present invention, tests are carried out on a group of electronic components composed of a plurality of electronic components by using a common test signal in a first test step to detect whether the whole group of the electronic components is good or defective. At this time, when a correct response output signal can be obtained as the whole group of electronic components, all of the electronic components composing the group are judged good regardless of the fact that the test signal is common or not. Inversely, when an abnormal response output signal is obtained as the whole group, which one of the electronic components composing the group is good or defective cannot be specified. Therefore, in the present invention, a second test step is provided.
Namely, in the second test step, the electronic components composing a group of electronic components judged to be defective in the first test step are respectively input mutually independent test signals, not a common test signal. Then, in accordance with the response signal, each of the electronic components subjected to the test is judged to be good or defective. In this way, it is possible to detect which of the electronic components is good or defective in the group judged to be defective.
As a result, it is possible to perform tests simultaneously on a plurality of electronic components by using terminals on one test head side, and to increase the number of electronic components to be simultaneously tested without increasing the number of terminals of the test head.
The testing method of electronic components is especially efficient in the case where the rate of good electronic components is high because the separate tests in units of an electronic component have to be carried out only when a group of electronic components is judged to be defective.
As kinds of test signals according to the present invention is not specifically limited, and, for example, in a memory IC, in addition to address specifying signals input from the driver terminals, input signals input from the input terminals are also included.
(1-2) In the above invention, the second test step may be placed immediately after the first test step, or instead of this, a step of rearranging electronic components judged to be defective in the first test step and a step of conveying the rearranged electronic components to the second test step may be included between the first test step and the second test step.
(1-3) In the above invention, an input form of a commonly input test signal in the first test step is not specifically limited and, for example, it is input in parallel from a common terminal of a test head to respective electronic components of the group of electronic component.
Also, instead of this, as an input form of a test signal commonly input in the first test step, it is selectively input from a common terminal of a test head to respective electronic components of the group of electronic component.
In the former input form, by dividing a terminal circuit (for example a socket board) on the socket side, it is possible to simultaneously carry out tests on a plurality of electronic components by using the terminals no one test head side. While in the latter input form, by dividing the terminal circuit (for example a performance board) on the test head side, it is possible to carry out tests on a plurality of electronic components by using terminals on one test head side. In both cases, when either one of the socket si
Advantest Corporation
Barlow John
Cherry Stephen J.
LandOfFree
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