Method of testing and addressing a magnetic core memory

Details Method of testing and addressing a magnetic core memory Method of testing and addressing a magnetic core memory

1985-05-09

1987-05-26

Atkinson, Charles E.

Excavating

365201, 371 11, G06F 1110, G11C 2900

Patent

active

046690824

ABSTRACT:
A method of testing a magnetic core memory includes writing a test bit to each storage location addressed by each X-drive/X-sink transistor pair and each Y-drive/Y-sink transistor pair to determine which transistor or transistors of each pair is or are inoperable. Once this determination is made, a memory status map is created designating the inoperable transistors. Thereafter, the map contents are converted into an address field for matching against a selected memory address. If the selected memory address calls for an inoperable transistor, as indicated by a comparison with the address field, this is detected and the address changed until only operable transistors are accessed.

REFERENCES:
patent: 4012712 (1977-03-01), Nelligan
patent: 4061908 (1977-12-01), de Jonge et al.
patent: 4310901 (1982-01-01), Harding et al.
patent: 4456995 (1984-06-01), Ryan
patent: 4464750 (1984-08-01), Tatematsu
patent: 4479214 (1984-10-01), Ryan
patent: 4520453 (1985-05-01), Chow
Rogers, Checking Random-Access Memory, IBM Technical Disclosure Bulletin, vol. 20, No. 10, Mar. 1978, pp. 4173-4174.

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