Method of testing an evaluation circuit

Details Method of testing an evaluation circuit Method of testing an evaluation circuit

2000-05-17

2003-01-07

Hilten, John S. (Department: 2863)

Data processing: measuring, calibrating, or testing

Testing system

Of circuit

C324S422000

Reexamination Certificate

active

06505136

ABSTRACT:

TECHNICAL AREA
The invention relates to an evaluation circuit used to test for contact between a switch or key and a testing means, and which has an input and an output buffer. More particularly, the invention relates to isolating possible causes of failure of such an evaluation circuit.
STATE OF THE ART
A method and a device for testing a key or switch is known from DE-A-19718041. To determine different failure conditions, a testing means in the form of a capacitor can be arranged for example in parallel with the switch or key. The known document, DE-A-19718041, also indicates a device with a capacitor in series with a two-way switch, where one circuit path comprising the capacitor and the switch unit short-circuits the I/O port of an evaluation circuit to ground, and the other circuit path (=off position of the switch) connects the I/O port of the evaluation circuit to ground via the capacitor. The evaluation circuit itself essentially comprises a controller, an input buffer and an output buffer, where an inverted connection between the controller and the input buffer switches the input buffer and the output buffer to different polarities.
If the correct contact of the switch or key is to be determined, the unit comprising the capacitor and the switch is first connected to the I/O port of the evaluation circuit. To simplify the illustration of the relationships when the unit contacts the I/O port, it is assumed that the switch or key is in its off position, and thus the unit connects the I/O port of the evaluation circuit to ground via the capacitor. Once the connection is established between the unit and the I/O port of the evaluation circuit, a current flows via a resistor R to the capacitor and in the known example charges the latter to U
c
=5 volts. After that the capacitor is blocked and is in the off position, i.e. no current flows. Since there is no possibility of any discharge, the capacitor remains charged even if the switch or key is subsequently activated.
If the known device is now to be used to detect a line fault (grounding) it is necessary for the I/O port of the switch or key being tested to be read at a suitable to one, indicated as time
1
in DE-A-19718041. If the I/O port reads “Low” at time
1
, it is a sure sign that grounding has taken place, since according to the above assumption the switch or the key is in its off position.
Even faulty contacts of the capacitor and of the unit formed by the capacitor and the switch or key can be determined by the known unit. To that end a change-over is brought about at a time
2
whereby the I/O port is switched from input to output and reads “Low”. This causes the capacitor to discharge to the I/O port. If the capacitor is fully discharged after a time period t
u
, the I/O port is again switched to input at a time
3
. The result is that the capacitor recharges through the resistor during the time period t
m
and attains the charge U
c
=5 volts. At the same time the I/O port can be read again after the switch-over at time
3
, and the signal level determined at a time
4
during the time period t
m
can be used to determine a faulty contact by comparing it to a threshold value U
g
. If the signal level that is determined at time
4
is below the threshold value U
g
, it ensures that the unit formed by the capacitor and the switch or key is available and is correctly connected. An unavailable capacitor and switch or key unit is detected in that the signal level determined at time
4
is above the threshold value U
g
, because the unavailable capacitor causes the potential to immediately fall back to its starting position.
Even if the known method or device can be used to very simply detect faulty contacts in the capacitor and switch or key unit, as well as short circuits in the line, which would also avoid lengthy trouble-shooting, a signal level which is above the threshold value U
g
at time
4
does not express with certainty that the unit formed by the capacitor and the switch or key actually has a faulty contact. Expensive manual activities must be used especially when this condition occurs, to verify whether the fault lies in the unit or in the evaluation circuit. For that reason the invention has the objective of presenting a method and a device that eliminates the disadvantages of the state of the art, and thereby contributes to a faster detection and elimination of the fault.
SUMMARY OF THE INVENTION
This method is achieved by a method of testing an evaluation circuit, which in a d.c.-supplied circuit tests a correct contact between a switch or key and a respectively assigned testing device, and which has an output and an input buffer, where the output buffer is active during a time period t
u
, which together with a time period t
m
forms a time period t
g
, and where the correct contact of the switch or key is tested during the time period t
m
, characterized in that the input buffer is also active during the time period t
u
,
The objective is also achieved by a device for testing an evaluation circuit, which in a d.c.-supplied circuit tests a correct contact between a switch or key and a respectively assigned testing device, and which has a microcomputer and an input and an output buffer, characterized in that in order to exchange data with the microcomputer, the input buffer and the output buffer are connected via a data line to the microcomputer.
The method of this objective is achieved by a method of testing an evaluation circuit, which in a d.c.-supplied circuit tests a correct contact between a switch or key and a respectively assigned testing device, and which has an output and an input buffer, where the output buffer is active during a time period t
u
, which together with a time period t
m
forms a time period t
g
, and where the correct contact of the switch or key is tested during the time period t
m
, characterized in that the input buffer is also active during the time period t
u
,
The objective is also achieved by a device for testing an evaluation circuit, which in a d.c.-supplied circuit tests a correct contact between a switch or key and a respectively assigned testing device, and which has a microcomputer and an input and an output buffer, characterized in that in order to exchange data with the microcomputer, the input buffer and the output buffer are connected via a data line to the microcomputer.
If the method is designed as claimed in claim
1
, where the input buffer is also activated during the time period t
u
, it can be used to determine whether the output functions correctly or incorrectly. For example if the output buffer functions correctly, a signal level which decreases to zero can be observed at the I/O port in the time period t
u
during which the capacitor is discharged. However if the output buffer is defective, the signal level remains at the previous 5 volts during the time period t
u
. If a signal level is then determined to be above the threshold value U
g
at a time
4
, comparing the signal level during the time period t
u
with the signal level at the time
4
can determine whether the signal level above the threshold value U
g
at a time
4
is caused by a faulty contact in the unit formed by the capacitor and switch or key, or by a defective output buffer. A defective output buffer is the cause if the two signal levels determined during the time periods t
u
and t
m
are the same or at least if the signal level that was determined during the time period t
u
is higher than the signal level that was determined during the time period t
m
. The cause is a faulty contact in the capacitor and switch or key unit if the signal level, which was determined during the time period t
u
, is lower than the signal level that was determined at the time
4
. A reference between the signal levels determined during the time period t
u
and the time period t
m
is not needed to test the output buffer. Rather to detect a faulty output buffer, the signal level determined during the time period t
u
can also be compared to the threshold value U
g
.
The device p

Affiliated with

Also associated with

Rating

Method of testing an evaluation circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of testing an evaluation circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of testing an evaluation circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3047599