1975-08-08
1977-03-29
Murray, Richard
H04B 100
Patent
active
040152049
ABSTRACT:
A method of telecommunications involving a train of binary signals. A predetermined number (a frame) of the signals is stored in a first register. There are second, third and fourth registers, each of which stores a different number of binary digits, but the total digits stored in the second, third and fourth registers equals the total storage capacity of the first register. The digits are read out of the first register into the second, third and fourth registers. There are three carrier waves for the outputs of the second, third and fourth registers respectively. The ratio of the frequency of a carrier wave to the number of binary signals in the group that is complementary to that particular carrier wave is the same for each carrier wave and its complementary group of binary signals. The three carrier waves are amplitude modulated by the contents of their complementary registers so that each cycle of each carrier wave represents a single binary digit. The three carrier signals may be fed into a common transmission line and delivered to the receiving location. After the signals have been fed out of the first register and are being held in the second, third and fourth registers, the first register is being refilled with the next frame of binary signals. Moreover, after the signals in the second, third and fourth registers have modulated their respective carrier waves, they receive binary signals (representing the second frame) from the first register and those binary signals thereafter modulate their respective carrier waves accordingly. The process thus repeats itself from one frame to the next of the incoming binary signals.
At the receiver the three carrier waves are demodulated and the contents of said second register (at the transmitter) are stored in a similar register (A) at the receiver. The contents of the third register (at the transmitter) are stored in a similar register (B) at the receiver, and the contents of the fourth register (at the transmitter) are stored in a similar register (C) at the receiver. The outputs of the said three registers (A, B and C) at the receiver are then read-out into an output register which has the same digit capacity as the said first register (at the transmitter). As the signals are fed to the output register, the next frame of the train of binary signals are entered into the first three named registers of the receiver, and are then fed to the output register after the first frame of binary signals has been read out of the output register. The original train of binary signals is reconstructed at the receiver from said output register as the frames of binary signals are fed out one after another.
REFERENCES:
patent: 3497618 (1970-02-01), Thayer
patent: 3885217 (1975-05-01), Cintron
patent: 3919641 (1975-11-01), Kurokawa
Hall William D.
Murray Richard
Myers Geoffrey R.
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