Method of stitching scan flipflops together to form a scan...

Details Method of stitching scan flipflops together to form a scan... Method of stitching scan flipflops together to form a scan...

2011-08-09

2011-08-09

Kik, Phallaka (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S125000, C716S129000, C716S130000, C716S131000

Reexamination Certificate

active

07996805

ABSTRACT:
The scan flipflops on a semiconductor chip are stitched together to form one or more scan chains, located in one or more standard cell placement regions, after the optimal physical location of each scan flip-flop has been determined. As a result, the total length of the scan chain wires is substantially reduced, thereby reducing on-chip wiring congestion, flip-flop load capacitance, and flipflop power dissipation.

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