Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Reexamination Certificate
2009-02-19
2010-12-14
Andújar, Leonardo (Department: 2826)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
C438S121000, C438S122000
Reexamination Certificate
active
07851269
ABSTRACT:
Embodiments of the present invention relate to a method of stiffening a semiconductor coreless package substrate to improve rigidity and resistance against warpage. An embodiment of the method comprises disposing a sacrificial mask on a plurality of contact pads on a second level interconnect (package-to-board interconnect) side of a coreless package substrate, forming a molded stiffener around the sacrificial mask without increasing the effective thickness of the substrate, and removing the sacrificial mask to form a plurality of cavities in the molded stiffener corresponding to the contact pads. Embodiments also include plating the surface of the contact pads and the sidewalls of the cavities in the molded cavities with an electrically conductive material.
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patent: 6989593 (2006-01-01), Khan et al.
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patent: 7517730 (2009-04-01), Cho
patent: 2005/0133905 (2005-06-01), Zhao et al.
patent: 2005/0179143 (2005-08-01), Moxham
Guzek John S.
Muthukumar Sriram
Watts Nicholas R.
Andújar Leonardo
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
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